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Merge branches 'sh/intc-extension', 'sh/dmaengine', 'sh/serial-dma' and 'sh/clkfwk'

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Conflicts:
	arch/sh/kernel/cpu/clock.c

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
2010-03-30 11:26:43 +09:00
parent 6ae6650232 dec710b77c 3089f381fb f4cff0d0ff
commit 720fcb36ac
52 changed files with 863 additions and 697 deletions
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2
arch/sh/kernel/Makefile
View File

@ -11,7 +11,7 @@ endif
CFLAGS_REMOVE_return_address.o = -pg
obj-y := debugtraps.o dma-nommu.o dumpstack.o \
obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
idle.o io.o io_generic.o irq.o \
irq_$(BITS).o machvec.o nmi_debug.o process.o \
process_$(BITS).o ptrace_$(BITS).o \

169
arch/sh/kernel/clkdev.c Normal file
View File

@ -0,0 +1,169 @@
/*
* arch/sh/kernel/clkdev.c
*
* Cloned from arch/arm/common/clkdev.c:
*
* Copyright (C) 2008 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Helper for the clk API to assist looking up a struct clk.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/mutex.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/bootmem.h>
#include <linux/mm.h>
#include <asm/clock.h>
#include <asm/clkdev.h>
static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
/*
* Find the correct struct clk for the device and connection ID.
* We do slightly fuzzy matching here:
* An entry with a NULL ID is assumed to be a wildcard.
* If an entry has a device ID, it must match
* If an entry has a connection ID, it must match
* Then we take the most specific entry - with the following
* order of precidence: dev+con > dev only > con only.
*/
static struct clk *clk_find(const char *dev_id, const char *con_id)
{
struct clk_lookup *p;
struct clk *clk = NULL;
int match, best = 0;
list_for_each_entry(p, &clocks, node) {
match = 0;
if (p->dev_id) {
if (!dev_id || strcmp(p->dev_id, dev_id))
continue;
match += 2;
}
if (p->con_id) {
if (!con_id || strcmp(p->con_id, con_id))
continue;
match += 1;
}
if (match == 0)
continue;
if (match > best) {
clk = p->clk;
best = match;
}
}
return clk;
}
struct clk *clk_get_sys(const char *dev_id, const char *con_id)
{
struct clk *clk;
mutex_lock(&clocks_mutex);
clk = clk_find(dev_id, con_id);
mutex_unlock(&clocks_mutex);
return clk ? clk : ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get_sys);
void clkdev_add(struct clk_lookup *cl)
{
mutex_lock(&clocks_mutex);
list_add_tail(&cl->node, &clocks);
mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL(clkdev_add);
void __init clkdev_add_table(struct clk_lookup *cl, size_t num)
{
mutex_lock(&clocks_mutex);
while (num--) {
list_add_tail(&cl->node, &clocks);
cl++;
}
mutex_unlock(&clocks_mutex);
}
#define MAX_DEV_ID 20
#define MAX_CON_ID 16
struct clk_lookup_alloc {
struct clk_lookup cl;
char dev_id[MAX_DEV_ID];
char con_id[MAX_CON_ID];
};
struct clk_lookup * __init_refok
clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)
{
struct clk_lookup_alloc *cla;
if (!slab_is_available())
cla = alloc_bootmem_low_pages(sizeof(*cla));
else
cla = kzalloc(sizeof(*cla), GFP_KERNEL);
if (!cla)
return NULL;
cla->cl.clk = clk;
if (con_id) {
strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
cla->cl.con_id = cla->con_id;
}
if (dev_fmt) {
va_list ap;
va_start(ap, dev_fmt);
vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
cla->cl.dev_id = cla->dev_id;
va_end(ap);
}
return &cla->cl;
}
EXPORT_SYMBOL(clkdev_alloc);
int clk_add_alias(const char *alias, const char *alias_dev_name, char *id,
struct device *dev)
{
struct clk *r = clk_get(dev, id);
struct clk_lookup *l;
if (IS_ERR(r))
return PTR_ERR(r);
l = clkdev_alloc(r, alias, alias_dev_name);
clk_put(r);
if (!l)
return -ENODEV;
clkdev_add(l);
return 0;
}
EXPORT_SYMBOL(clk_add_alias);
/*
* clkdev_drop - remove a clock dynamically allocated
*/
void clkdev_drop(struct clk_lookup *cl)
{
mutex_lock(&clocks_mutex);
list_del(&cl->node);
mutex_unlock(&clocks_mutex);
kfree(cl);
}
EXPORT_SYMBOL(clkdev_drop);

5
arch/sh/kernel/cpu/clock-cpg.c
View File

@ -338,6 +338,11 @@ int __init __deprecated cpg_clk_init(void)
ret |= clk_register(clk);
}
clk_add_alias("tmu_fck", NULL, "peripheral_clk", NULL);
clk_add_alias("mtu2_fck", NULL, "peripheral_clk", NULL);
clk_add_alias("cmt_fck", NULL, "peripheral_clk", NULL);
clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);
return ret;
}

55
arch/sh/kernel/cpu/clock.c
View File

@ -10,10 +10,6 @@
*
* Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
*
* With clkdev bits:
*
* Copyright (C) 2008 Russell King.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
@ -30,6 +26,7 @@
#include <linux/platform_device.h>
#include <linux/debugfs.h>
#include <linux/cpufreq.h>
#include <linux/clk.h>
#include <asm/clock.h>
#include <asm/machvec.h>
@ -397,56 +394,6 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
}
EXPORT_SYMBOL_GPL(clk_round_rate);
/*
* Find the correct struct clk for the device and connection ID.
* We do slightly fuzzy matching here:
* An entry with a NULL ID is assumed to be a wildcard.
* If an entry has a device ID, it must match
* If an entry has a connection ID, it must match
* Then we take the most specific entry - with the following
* order of precedence: dev+con > dev only > con only.
*/
static struct clk *clk_find(const char *dev_id, const char *con_id)
{
struct clk_lookup *p;
struct clk *clk = NULL;
int match, best = 0;
list_for_each_entry(p, &clock_list, node) {
match = 0;
if (p->dev_id) {
if (!dev_id || strcmp(p->dev_id, dev_id))
continue;
match += 2;
}
if (p->con_id) {
if (!con_id || strcmp(p->con_id, con_id))
continue;
match += 1;
}
if (match == 0)
continue;
if (match > best) {
clk = p->clk;
best = match;
}
}
return clk;
}
struct clk *clk_get_sys(const char *dev_id, const char *con_id)
{
struct clk *clk;
mutex_lock(&clock_list_sem);
clk = clk_find(dev_id, con_id);
mutex_unlock(&clock_list_sem);
return clk ? clk : ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL_GPL(clk_get_sys);
/*
* Returns a clock. Note that we first try to use device id on the bus
* and clock name. If this fails, we try to use clock name only.

6
arch/sh/kernel/cpu/sh2/setup-sh7619.c
View File

@ -128,17 +128,14 @@ static struct platform_device eth_device = {
};
static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt0_resources[] = {
[0] = {
.name = "CMT0",
.start = 0xf84a0072,
.end = 0xf84a0077,
.flags = IORESOURCE_MEM,
@ -160,17 +157,14 @@ static struct platform_device cmt0_device = {
};
static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.name = "CMT1",
.start = 0xf84a0078,
.end = 0xf84a007d,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh2a/setup-mxg.c
View File

@ -115,16 +115,13 @@ static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
mask_registers, prio_registers, NULL);
static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.name = "MTU2_0",
.start = 0xff801300,
.end = 0xff801326,
.flags = IORESOURCE_MEM,
@ -146,16 +143,13 @@ static struct platform_device mtu2_0_device = {
};
static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_1_resources[] = {
[0] = {
.name = "MTU2_1",
.start = 0xff801380,
.end = 0xff801390,
.flags = IORESOURCE_MEM,
@ -177,16 +171,13 @@ static struct platform_device mtu2_1_device = {
};
static struct sh_timer_config mtu2_2_platform_data = {
.name = "MTU2_2",
.channel_offset = 0x80,
.timer_bit = 2,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_2_resources[] = {
[0] = {
.name = "MTU2_2",
.start = 0xff801000,
.end = 0xff80100a,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh2a/setup-sh7201.c
View File

@ -318,16 +318,13 @@ static struct platform_device rtc_device = {
};
static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.name = "MTU2_0",
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
@ -349,16 +346,13 @@ static struct platform_device mtu2_0_device = {
};
static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_1_resources[] = {
[0] = {
.name = "MTU2_1",
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
@ -380,16 +374,13 @@ static struct platform_device mtu2_1_device = {
};
static struct sh_timer_config mtu2_2_platform_data = {
.name = "MTU2_2",
.channel_offset = 0x80,
.timer_bit = 2,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_2_resources[] = {
[0] = {
.name = "MTU2_2",
.start = 0xfffe4000,
.end = 0xfffe400a,
.flags = IORESOURCE_MEM,

12
arch/sh/kernel/cpu/sh2a/setup-sh7203.c
View File

@ -234,17 +234,14 @@ static struct platform_device scif3_device = {
};
static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt0_resources[] = {
[0] = {
.name = "CMT0",
.start = 0xfffec002,
.end = 0xfffec007,
.flags = IORESOURCE_MEM,
@ -266,17 +263,14 @@ static struct platform_device cmt0_device = {
};
static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.name = "CMT1",
.start = 0xfffec008,
.end = 0xfffec00d,
.flags = IORESOURCE_MEM,
@ -298,16 +292,13 @@ static struct platform_device cmt1_device = {
};
static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.name = "MTU2_0",
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
@ -329,16 +320,13 @@ static struct platform_device mtu2_0_device = {
};
static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_1_resources[] = {
[0] = {
.name = "MTU2_1",
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,

15
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
View File

@ -194,17 +194,14 @@ static struct platform_device scif3_device = {
};
static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt0_resources[] = {
[0] = {
.name = "CMT0",
.start = 0xfffec002,
.end = 0xfffec007,
.flags = IORESOURCE_MEM,
@ -226,17 +223,14 @@ static struct platform_device cmt0_device = {
};
static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.name = "CMT1",
.start = 0xfffec008,
.end = 0xfffec00d,
.flags = IORESOURCE_MEM,
@ -258,16 +252,13 @@ static struct platform_device cmt1_device = {
};
static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.name = "MTU2_0",
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
@ -289,16 +280,13 @@ static struct platform_device mtu2_0_device = {
};
static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_1_resources[] = {
[0] = {
.name = "MTU2_1",
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
@ -320,16 +308,13 @@ static struct platform_device mtu2_1_device = {
};
static struct sh_timer_config mtu2_2_platform_data = {
.name = "MTU2_2",
.channel_offset = 0x80,
.timer_bit = 2,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource mtu2_2_resources[] = {
[0] = {
.name = "MTU2_2",
.start = 0xfffe4000,
.end = 0xfffe400a,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh3/setup-sh7705.c
View File

@ -124,16 +124,13 @@ static struct platform_device rtc_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xfffffe94,
.end = 0xfffffe9f,
.flags = IORESOURCE_MEM,
@ -155,16 +152,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0xe,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xfffffea0,
.end = 0xfffffeab,
.flags = IORESOURCE_MEM,
@ -186,15 +180,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1a,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xfffffeac,
.end = 0xfffffebb,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh3/setup-sh770x.c
View File

@ -157,16 +157,13 @@ static struct platform_device scif2_device = {
#endif
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xfffffe94,
.end = 0xfffffe9f,
.flags = IORESOURCE_MEM,
@ -188,16 +185,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0xe,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xfffffea0,
.end = 0xfffffeab,
.flags = IORESOURCE_MEM,
@ -219,15 +213,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1a,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xfffffeac,
.end = 0xfffffebb,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh3/setup-sh7710.c
View File

@ -127,16 +127,13 @@ static struct platform_device scif1_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xa412fe94,
.end = 0xa412fe9f,
.flags = IORESOURCE_MEM,
@ -158,16 +155,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0xe,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xa412fea0,
.end = 0xa412feab,
.flags = IORESOURCE_MEM,
@ -189,15 +183,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1a,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xa412feac,
.end = 0xa412feb5,
.flags = IORESOURCE_MEM,

24
arch/sh/kernel/cpu/sh3/setup-sh7720.c
View File

@ -130,17 +130,14 @@ static struct platform_device usbf_device = {
};
static struct sh_timer_config cmt0_platform_data = {
.name = "CMT0",
.channel_offset = 0x10,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 125,
.clocksource_rating = 125,
};
static struct resource cmt0_resources[] = {
[0] = {
.name = "CMT0",
.start = 0x044a0010,
.end = 0x044a001b,
.flags = IORESOURCE_MEM,
@ -162,15 +159,12 @@ static struct platform_device cmt0_device = {
};
static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x20,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource cmt1_resources[] = {
[0] = {
.name = "CMT1",
.start = 0x044a0020,
.end = 0x044a002b,
.flags = IORESOURCE_MEM,
@ -192,15 +186,12 @@ static struct platform_device cmt1_device = {
};
static struct sh_timer_config cmt2_platform_data = {
.name = "CMT2",
.channel_offset = 0x30,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource cmt2_resources[] = {
[0] = {
.name = "CMT2",
.start = 0x044a0030,
.end = 0x044a003b,
.flags = IORESOURCE_MEM,
@ -222,15 +213,12 @@ static struct platform_device cmt2_device = {
};
static struct sh_timer_config cmt3_platform_data = {
.name = "CMT3",
.channel_offset = 0x40,
.timer_bit = 3,
.clk = "peripheral_clk",
};
static struct resource cmt3_resources[] = {
[0] = {
.name = "CMT3",
.start = 0x044a0040,
.end = 0x044a004b,
.flags = IORESOURCE_MEM,
@ -252,15 +240,12 @@ static struct platform_device cmt3_device = {
};
static struct sh_timer_config cmt4_platform_data = {
.name = "CMT4",
.channel_offset = 0x50,
.timer_bit = 4,
.clk = "peripheral_clk",
};
static struct resource cmt4_resources[] = {
[0] = {
.name = "CMT4",
.start = 0x044a0050,
.end = 0x044a005b,
.flags = IORESOURCE_MEM,
@ -282,16 +267,13 @@ static struct platform_device cmt4_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x02,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xa412fe94,
.end = 0xa412fe9f,
.flags = IORESOURCE_MEM,
@ -313,16 +295,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0xe,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xa412fea0,
.end = 0xa412feab,
.flags = IORESOURCE_MEM,
@ -344,15 +323,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1a,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xa412feac,
.end = 0xa412feb5,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh4/setup-sh4-202.c
View File

@ -31,16 +31,13 @@ static struct platform_device scif0_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -62,16 +59,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -93,15 +87,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,

15
arch/sh/kernel/cpu/sh4/setup-sh7750.c
View File

@ -66,16 +66,13 @@ static struct platform_device scif1_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -97,16 +94,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -128,15 +122,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
@ -163,15 +154,12 @@ static struct platform_device tmu2_device = {
defined(CONFIG_CPU_SUBTYPE_SH7751R)
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xfe100008,
.end = 0xfe100013,
.flags = IORESOURCE_MEM,
@ -193,15 +181,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xfe100014,
.end = 0xfe10001f,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh4/setup-sh7760.c
View File

@ -187,16 +187,13 @@ static struct platform_device scif3_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -218,16 +215,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -249,15 +243,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,

12
arch/sh/kernel/cpu/sh4a/clock-sh7343.c
View File

@ -154,15 +154,15 @@ static struct clk mstp_clks[] = {
MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0),
MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0),
MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0),
MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
MSTP("tmu_fck", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
MSTP("cmt_fck", &r_clk, MSTPCR0, 14, 0),
MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0),
MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
MSTP("scif3", &div4_clks[DIV4_P], MSTPCR0, 4, 0),
SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 7, 0),
SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 6, 0),
SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 4, 0),
MSTP("sio0", &div4_clks[DIV4_P], MSTPCR0, 3, 0),
MSTP("siof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0),
MSTP("siof1", &div4_clks[DIV4_P], MSTPCR0, 1, 0),

10
arch/sh/kernel/cpu/sh4a/clock-sh7366.c
View File

@ -158,14 +158,14 @@ static struct clk mstp_clks[] = {
MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0),
MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0),
MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0),
MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
MSTP("tmu_fck", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
MSTP("cmt_fck", &r_clk, MSTPCR0, 14, 0),
MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0),
MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 7, 0),
SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 6, 0),
SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
MSTP("msiof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0),
MSTP("sbr0", &div4_clks[DIV4_P], MSTPCR0, 1, 0),

10
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View File

@ -160,13 +160,13 @@ struct clk div6_clks[] = {
static struct clk mstp_clks[] = {
SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0),
SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("tmu_fck", -1, P_CLK, HWBLK_TMU, 0),
SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),

58
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
View File

@ -21,6 +21,8 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <asm/clkdev.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7723.h>
@ -171,18 +173,18 @@ static struct clk mstp_clks[] = {
SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("tmu012_fck", -1, P_CLK, HWBLK_TMU0, 0),
SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
SH_HWBLK_CLK("tmu345_fck", -1, P_CLK, HWBLK_TMU1, 0),
SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("sci_fck", 3, B_CLK, HWBLK_SCIF3, 0),
SH_HWBLK_CLK("sci_fck", 4, B_CLK, HWBLK_SCIF4, 0),
SH_HWBLK_CLK("sci_fck", 5, B_CLK, HWBLK_SCIF5, 0),
SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0),
@ -211,6 +213,40 @@ static struct clk mstp_clks[] = {
SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
};
static struct clk_lookup lookups[] = {
{
/* TMU0 */
.dev_id = "sh_tmu.0",
.con_id = "tmu_fck",
.clk = &mstp_clks[11], /* tmu012_fck */
}, {
/* TMU1 */
.dev_id = "sh_tmu.1",
.con_id = "tmu_fck",
.clk = &mstp_clks[11],
}, {
/* TMU2 */
.dev_id = "sh_tmu.2",
.con_id = "tmu_fck",
.clk = &mstp_clks[11],
}, {
/* TMU3 */
.dev_id = "sh_tmu.3",
.con_id = "tmu_fck",
.clk = &mstp_clks[15], /* tmu345_fck */
}, {
/* TMU4 */
.dev_id = "sh_tmu.4",
.con_id = "tmu_fck",
.clk = &mstp_clks[15],
}, {
/* TMU5 */
.dev_id = "sh_tmu.5",
.con_id = "tmu_fck",
.clk = &mstp_clks[15],
},
};
int __init arch_clk_init(void)
{
int k, ret = 0;
@ -222,7 +258,9 @@ int __init arch_clk_init(void)
pll_clk.parent = &extal_clk;
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
ret |= clk_register(main_clks[k]);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);

56
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View File

@ -21,6 +21,8 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <asm/clkdev.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7724.h>
@ -189,17 +191,17 @@ static struct clk mstp_clks[] = {
SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("tmu012_fck", -1, P_CLK, HWBLK_TMU0, 0),
SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0),
SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
SH_HWBLK_CLK("tmu345_fck", -1, P_CLK, HWBLK_TMU1, 0),
SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0),
SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0),
SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0),
SH_HWBLK_CLK("sci_fck", 3, B_CLK, HWBLK_SCIF3, 0),
SH_HWBLK_CLK("sci_fck", 4, B_CLK, HWBLK_SCIF4, 0),
SH_HWBLK_CLK("sci_fck", 5, B_CLK, HWBLK_SCIF5, 0),
SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
@ -233,6 +235,40 @@ static struct clk mstp_clks[] = {
SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
};
static struct clk_lookup lookups[] = {
{
/* TMU0 */
.dev_id = "sh_tmu.0",
.con_id = "tmu_fck",
.clk = &mstp_clks[12], /* tmu012_fck */
}, {
/* TMU1 */
.dev_id = "sh_tmu.1",
.con_id = "tmu_fck",
.clk = &mstp_clks[12],
}, {
/* TMU2 */
.dev_id = "sh_tmu.2",
.con_id = "tmu_fck",
.clk = &mstp_clks[12],
}, {
/* TMU3 */
.dev_id = "sh_tmu.3",
.con_id = "tmu_fck",
.clk = &mstp_clks[16], /* tmu345_fck */
}, {
/* TMU4 */
.dev_id = "sh_tmu.4",
.con_id = "tmu_fck",
.clk = &mstp_clks[16],
}, {
/* TMU5 */
.dev_id = "sh_tmu.5",
.con_id = "tmu_fck",
.clk = &mstp_clks[16],
},
};
int __init arch_clk_init(void)
{
int k, ret = 0;
@ -246,6 +282,8 @@ int __init arch_clk_init(void)
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);

51
arch/sh/kernel/cpu/sh4a/clock-sh7785.c
View File

@ -3,7 +3,7 @@
*
* SH7785 support for the clock framework
*
* Copyright (C) 2007 - 2009 Paul Mundt
* Copyright (C) 2007 - 2010 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -14,6 +14,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/cpufreq.h>
#include <asm/clkdev.h>
#include <asm/clock.h>
#include <asm/freq.h>
#include <cpu/sh7785.h>
@ -88,12 +89,12 @@ struct clk div4_clks[DIV4_NR] = {
static struct clk mstp_clks[] = {
/* MSTPCR0 */
SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
SH_CLK_MSTP32("sci_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
SH_CLK_MSTP32("sci_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0),
SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0),
@ -113,12 +114,48 @@ static struct clk mstp_clks[] = {
SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0),
};
static struct clk_lookup lookups[] = {
{
/* TMU0 */
.dev_id = "sh_tmu.0",
.con_id = "tmu_fck",
.clk = &mstp_clks[13], /* tmu012_fck */
}, {
/* TMU1 */
.dev_id = "sh_tmu.1",
.con_id = "tmu_fck",
.clk = &mstp_clks[13],
}, {
/* TMU2 */
.dev_id = "sh_tmu.2",
.con_id = "tmu_fck",
.clk = &mstp_clks[13],
}, {
/* TMU3 */
.dev_id = "sh_tmu.3",
.con_id = "tmu_fck",
.clk = &mstp_clks[12], /* tmu345_fck */
}, {
/* TMU4 */
.dev_id = "sh_tmu.4",
.con_id = "tmu_fck",
.clk = &mstp_clks[12],
}, {
/* TMU5 */
.dev_id = "sh_tmu.5",
.con_id = "tmu_fck",
.clk = &mstp_clks[12],
},
};
int __init arch_clk_init(void)
{
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(clks); i++)
ret |= clk_register(clks[i]);
for (i = 0; i < ARRAY_SIZE(lookups); i++)
clkdev_add(&lookups[i]);
if (!ret)
ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),

80
arch/sh/kernel/cpu/sh4a/clock-sh7786.c
View File

@ -13,6 +13,8 @@
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <asm/clkdev.h>
#include <asm/clock.h>
#include <asm/freq.h>
@ -87,12 +89,12 @@ struct clk div4_clks[DIV4_NR] = {
static struct clk mstp_clks[] = {
/* MSTPCR0 */
SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
SH_CLK_MSTP32("sci_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
SH_CLK_MSTP32("sci_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0),
SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0),
SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
@ -120,12 +122,78 @@ static struct clk mstp_clks[] = {
SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0),
};
static struct clk_lookup lookups[] = {
{
/* TMU0 */
.dev_id = "sh_tmu.0",
.con_id = "tmu_fck",
.clk = &mstp_clks[17], /* tmu012_fck */
}, {
/* TMU1 */
.dev_id = "sh_tmu.1",
.con_id = "tmu_fck",
.clk = &mstp_clks[17],
}, {
/* TMU2 */
.dev_id = "sh_tmu.2",
.con_id = "tmu_fck",
.clk = &mstp_clks[17],
}, {
/* TMU3 */
.dev_id = "sh_tmu.3",
.con_id = "tmu_fck",
.clk = &mstp_clks[16], /* tmu345_fck */
}, {
/* TMU4 */
.dev_id = "sh_tmu.4",
.con_id = "tmu_fck",
.clk = &mstp_clks[16],
}, {
/* TMU5 */
.dev_id = "sh_tmu.5",
.con_id = "tmu_fck",
.clk = &mstp_clks[16],
}, {
/* TMU6 */
.dev_id = "sh_tmu.6",
.con_id = "tmu_fck",
.clk = &mstp_clks[15], /* tmu678_fck */
}, {
/* TMU7 */
.dev_id = "sh_tmu.7",
.con_id = "tmu_fck",
.clk = &mstp_clks[15],
}, {
/* TMU8 */
.dev_id = "sh_tmu.8",
.con_id = "tmu_fck",
.clk = &mstp_clks[15],
}, {
/* TMU9 */
.dev_id = "sh_tmu.9",
.con_id = "tmu_fck",
.clk = &mstp_clks[14], /* tmu9_11_fck */
}, {
/* TMU10 */
.dev_id = "sh_tmu.10",
.con_id = "tmu_fck",
.clk = &mstp_clks[14],
}, {
/* TMU11 */
.dev_id = "sh_tmu.11",
.con_id = "tmu_fck",
.clk = &mstp_clks[14],
}
};
int __init arch_clk_init(void)
{
int i, ret = 0;
for (i = 0; i < ARRAY_SIZE(clks); i++)
ret |= clk_register(clks[i]);
for (i = 0; i < ARRAY_SIZE(lookups); i++)
clkdev_add(&lookups[i]);
if (!ret)
ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),

16
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
View File

@ -21,7 +21,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
};
static struct platform_device scif0_device = {
@ -37,7 +36,6 @@ static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
};
static struct platform_device scif1_device = {
@ -53,7 +51,6 @@ static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
};
static struct platform_device scif2_device = {
@ -69,7 +66,6 @@ static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 83, 83, 83, 83 },
.clk = "scif3",
};
static struct platform_device scif3_device = {
@ -207,17 +203,14 @@ static struct platform_device jpu_device = {
};
static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
.clk = "cmt0",
.clockevent_rating = 125,
.clocksource_rating = 200,
};
static struct resource cmt_resources[] = {
[0] = {
.name = "CMT",
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
@ -239,16 +232,13 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu0",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -270,16 +260,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu0",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -301,15 +288,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu0",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,

13
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
View File

@ -23,7 +23,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
};
static struct platform_device scif0_device = {
@ -169,17 +168,14 @@ static struct platform_device veu1_device = {
};
static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
.clk = "cmt0",
.clockevent_rating = 125,
.clocksource_rating = 200,
};
static struct resource cmt_resources[] = {
[0] = {
.name = "CMT",
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
@ -201,16 +197,13 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu0",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -232,16 +225,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu0",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -263,15 +253,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu0",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,

15
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
View File

@ -174,7 +174,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
};
static struct platform_device scif0_device = {
@ -190,7 +189,6 @@ static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
};
static struct platform_device scif1_device = {
@ -206,7 +204,6 @@ static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
};
static struct platform_device scif2_device = {
@ -401,17 +398,14 @@ static struct platform_device jpu_device = {
};
static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
.clk = "cmt0",
.clockevent_rating = 125,
.clocksource_rating = 125,
};
static struct resource cmt_resources[] = {
[0] = {
.name = "CMT",
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
@ -436,16 +430,13 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu0",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -470,16 +461,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu0",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -504,15 +492,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu0",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,

27
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
View File

@ -26,7 +26,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
};
static struct platform_device scif0_device = {
@ -42,7 +41,6 @@ static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
};
static struct platform_device scif1_device = {
@ -58,7 +56,6 @@ static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
};
static struct platform_device scif2_device = {
@ -74,7 +71,6 @@ static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 56, 56, 56, 56 },
.clk = "scif3",
};
static struct platform_device scif3_device = {
@ -90,7 +86,6 @@ static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 88, 88, 88, 88 },
.clk = "scif4",
};
static struct platform_device scif4_device = {
@ -106,7 +101,6 @@ static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 109, 109, 109, 109 },
.clk = "scif5",
};
static struct platform_device scif5_device = {
@ -211,17 +205,14 @@ static struct platform_device veu1_device = {
};
static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
.clk = "cmt0",
.clockevent_rating = 125,
.clocksource_rating = 125,
};
static struct resource cmt_resources[] = {
[0] = {
.name = "CMT",
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
@ -246,16 +237,13 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu0",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -280,16 +268,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu0",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -314,15 +299,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu0",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,
@ -347,15 +329,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu1",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffd90008,
.end = 0xffd90013,
.flags = IORESOURCE_MEM,
@ -380,15 +359,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu1",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffd90014,
.end = 0xffd9001f,
.flags = IORESOURCE_MEM,
@ -413,15 +389,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu1",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffd90020,
.end = 0xffd9002b,
.flags = IORESOURCE_MEM,

27
arch/sh/kernel/cpu/sh4a/setup-sh7724.c
View File

@ -213,7 +213,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
};
static struct platform_device scif0_device = {
@ -229,7 +228,6 @@ static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
};
static struct platform_device scif1_device = {
@ -245,7 +243,6 @@ static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
};
static struct platform_device scif2_device = {
@ -261,7 +258,6 @@ static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 56, 56, 56, 56 },
.clk = "scif3",
};
static struct platform_device scif3_device = {
@ -277,7 +273,6 @@ static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 88, 88, 88, 88 },
.clk = "scif4",
};
static struct platform_device scif4_device = {
@ -293,7 +288,6 @@ static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIFA,
.irqs = { 109, 109, 109, 109 },
.clk = "scif5",
};
static struct platform_device scif5_device = {
@ -485,17 +479,14 @@ static struct platform_device veu1_device = {
};
static struct sh_timer_config cmt_platform_data = {
.name = "CMT",
.channel_offset = 0x60,
.timer_bit = 5,
.clk = "cmt0",
.clockevent_rating = 125,
.clocksource_rating = 200,
};
static struct resource cmt_resources[] = {
[0] = {
.name = "CMT",
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
@ -520,16 +511,13 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu0",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -554,16 +542,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu0",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -588,15 +573,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu0",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,
@ -622,15 +604,12 @@ static struct platform_device tmu2_device = {
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu1",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffd90008,
.end = 0xffd90013,
.flags = IORESOURCE_MEM,
@ -655,15 +634,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu1",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffd90014,
.end = 0xffd9001f,
.flags = IORESOURCE_MEM,
@ -688,15 +664,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu1",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffd90020,
.end = 0xffd9002b,
.flags = IORESOURCE_MEM,

6
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
View File

@ -63,16 +63,13 @@ static struct platform_device scif4_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xfe430008,
.end = 0xfe430013,
.flags = IORESOURCE_MEM,
@ -94,16 +91,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xfe430014,
.end = 0xfe43001f,
.flags = IORESOURCE_MEM,

18
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
View File

@ -131,16 +131,13 @@ static struct platform_device usbf_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -162,16 +159,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -193,15 +187,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
@ -223,15 +214,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffd88008,
.end = 0xffd88013,
.flags = IORESOURCE_MEM,
@ -253,15 +241,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffd88014,
.end = 0xffd8801f,
.flags = IORESOURCE_MEM,
@ -283,15 +268,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffd88020,
.end = 0xffd8802b,
.flags = IORESOURCE_MEM,

27
arch/sh/kernel/cpu/sh4a/setup-sh7770.c
View File

@ -165,16 +165,13 @@ static struct platform_device scif9_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -196,16 +193,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -227,15 +221,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
@ -257,15 +248,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffd81008,
.end = 0xffd81013,
.flags = IORESOURCE_MEM,
@ -287,15 +275,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffd81014,
.end = 0xffd8101f,
.flags = IORESOURCE_MEM,
@ -317,15 +302,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffd81020,
.end = 0xffd8102f,
.flags = IORESOURCE_MEM,
@ -347,15 +329,12 @@ static struct platform_device tmu5_device = {
};
static struct sh_timer_config tmu6_platform_data = {
.name = "TMU6",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu6_resources[] = {
[0] = {
.name = "TMU6",
.start = 0xffd82008,
.end = 0xffd82013,
.flags = IORESOURCE_MEM,
@ -377,15 +356,12 @@ static struct platform_device tmu6_device = {
};
static struct sh_timer_config tmu7_platform_data = {
.name = "TMU7",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu7_resources[] = {
[0] = {
.name = "TMU7",
.start = 0xffd82014,
.end = 0xffd8201f,
.flags = IORESOURCE_MEM,
@ -407,15 +383,12 @@ static struct platform_device tmu7_device = {
};
static struct sh_timer_config tmu8_platform_data = {
.name = "TMU8",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu8_resources[] = {
[0] = {
.name = "TMU8",
.start = 0xffd82020,
.end = 0xffd8202b,
.flags = IORESOURCE_MEM,

18
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
View File

@ -49,16 +49,13 @@ static struct platform_device scif1_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -80,16 +77,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -111,15 +105,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
@ -141,15 +132,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffdc0008,
.end = 0xffdc0013,
.flags = IORESOURCE_MEM,
@ -171,15 +159,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffdc0014,
.end = 0xffdc001f,
.flags = IORESOURCE_MEM,
@ -201,15 +186,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffdc0020,
.end = 0xffdc002b,
.flags = IORESOURCE_MEM,

24
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
View File

@ -25,7 +25,6 @@ static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 40, 40, 40, 40 },
.clk = "scif_fck",
};
static struct platform_device scif0_device = {
@ -41,7 +40,6 @@ static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 44, 44, 44, 44 },
.clk = "scif_fck",
};
static struct platform_device scif1_device = {
@ -57,7 +55,6 @@ static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 60, 60, 60, 60 },
.clk = "scif_fck",
};
static struct platform_device scif2_device = {
@ -73,7 +70,6 @@ static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 61, 61, 61, 61 },
.clk = "scif_fck",
};
static struct platform_device scif3_device = {
@ -89,7 +85,6 @@ static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 62, 62, 62, 62 },
.clk = "scif_fck",
};
static struct platform_device scif4_device = {
@ -105,7 +100,6 @@ static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 63, 63, 63, 63 },
.clk = "scif_fck",
};
static struct platform_device scif5_device = {
@ -117,16 +111,13 @@ static struct platform_device scif5_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu012_fck",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -148,16 +139,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu012_fck",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -179,15 +167,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu012_fck",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
@ -209,15 +194,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "tmu345_fck",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffdc0008,
.end = 0xffdc0013,
.flags = IORESOURCE_MEM,
@ -239,15 +221,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "tmu345_fck",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffdc0014,
.end = 0xffdc001f,
.flags = IORESOURCE_MEM,
@ -269,15 +248,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "tmu345_fck",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffdc0020,
.end = 0xffdc002b,
.flags = IORESOURCE_MEM,

36
arch/sh/kernel/cpu/sh4a/setup-sh7786.c
View File

@ -117,16 +117,13 @@ static struct platform_device scif5_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
@ -148,16 +145,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
@ -179,15 +173,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
@ -209,15 +200,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffda0008,
.end = 0xffda0013,
.flags = IORESOURCE_MEM,
@ -239,15 +227,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffda0014,
.end = 0xffda001f,
.flags = IORESOURCE_MEM,
@ -269,15 +254,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffda0020,
.end = 0xffda002b,
.flags = IORESOURCE_MEM,
@ -299,15 +281,12 @@ static struct platform_device tmu5_device = {
};
static struct sh_timer_config tmu6_platform_data = {
.name = "TMU6",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu6_resources[] = {
[0] = {
.name = "TMU6",
.start = 0xffdc0008,
.end = 0xffdc0013,
.flags = IORESOURCE_MEM,
@ -329,15 +308,12 @@ static struct platform_device tmu6_device = {
};
static struct sh_timer_config tmu7_platform_data = {
.name = "TMU7",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu7_resources[] = {
[0] = {
.name = "TMU7",
.start = 0xffdc0014,
.end = 0xffdc001f,
.flags = IORESOURCE_MEM,
@ -359,15 +335,12 @@ static struct platform_device tmu7_device = {
};
static struct sh_timer_config tmu8_platform_data = {
.name = "TMU8",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu8_resources[] = {
[0] = {
.name = "TMU8",
.start = 0xffdc0020,
.end = 0xffdc002b,
.flags = IORESOURCE_MEM,
@ -389,15 +362,12 @@ static struct platform_device tmu8_device = {
};
static struct sh_timer_config tmu9_platform_data = {
.name = "TMU9",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu9_resources[] = {
[0] = {
.name = "TMU9",
.start = 0xffde0008,
.end = 0xffde0013,
.flags = IORESOURCE_MEM,
@ -419,15 +389,12 @@ static struct platform_device tmu9_device = {
};
static struct sh_timer_config tmu10_platform_data = {
.name = "TMU10",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu10_resources[] = {
[0] = {
.name = "TMU10",
.start = 0xffde0014,
.end = 0xffde001f,
.flags = IORESOURCE_MEM,
@ -449,15 +416,12 @@ static struct platform_device tmu10_device = {
};
static struct sh_timer_config tmu11_platform_data = {
.name = "TMU11",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu11_resources[] = {
[0] = {
.name = "TMU11",
.start = 0xffde0020,
.end = 0xffde002b,
.flags = IORESOURCE_MEM,

18
arch/sh/kernel/cpu/sh4a/setup-shx3.c
View File

@ -70,16 +70,13 @@ static struct platform_device scif2_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = 0xffc10008,
.end = 0xffc10013,
.flags = IORESOURCE_MEM,
@ -101,16 +98,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = 0xffc10014,
.end = 0xffc1001f,
.flags = IORESOURCE_MEM,
@ -132,15 +126,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = 0xffc10020,
.end = 0xffc1002f,
.flags = IORESOURCE_MEM,
@ -162,15 +153,12 @@ static struct platform_device tmu2_device = {
};
static struct sh_timer_config tmu3_platform_data = {
.name = "TMU3",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
};
static struct resource tmu3_resources[] = {
[0] = {
.name = "TMU3",
.start = 0xffc20008,
.end = 0xffc20013,
.flags = IORESOURCE_MEM,
@ -192,15 +180,12 @@ static struct platform_device tmu3_device = {
};
static struct sh_timer_config tmu4_platform_data = {
.name = "TMU4",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
};
static struct resource tmu4_resources[] = {
[0] = {
.name = "TMU4",
.start = 0xffc20014,
.end = 0xffc2001f,
.flags = IORESOURCE_MEM,
@ -222,15 +207,12 @@ static struct platform_device tmu4_device = {
};
static struct sh_timer_config tmu5_platform_data = {
.name = "TMU5",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu5_resources[] = {
[0] = {
.name = "TMU5",
.start = 0xffc20020,
.end = 0xffc2002b,
.flags = IORESOURCE_MEM,

9
arch/sh/kernel/cpu/sh5/setup-sh5.c
View File

@ -68,16 +68,13 @@ static struct platform_device rtc_device = {
#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2))
static struct sh_timer_config tmu0_platform_data = {
.name = "TMU0",
.channel_offset = 0x04,
.timer_bit = 0,
.clk = "peripheral_clk",
.clockevent_rating = 200,
};
static struct resource tmu0_resources[] = {
[0] = {
.name = "TMU0",
.start = TMU0_BASE,
.end = TMU0_BASE + 0xc - 1,
.flags = IORESOURCE_MEM,
@ -99,16 +96,13 @@ static struct platform_device tmu0_device = {
};
static struct sh_timer_config tmu1_platform_data = {
.name = "TMU1",
.channel_offset = 0x10,
.timer_bit = 1,
.clk = "peripheral_clk",
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.name = "TMU1",
.start = TMU1_BASE,
.end = TMU1_BASE + 0xc - 1,
.flags = IORESOURCE_MEM,
@ -130,15 +124,12 @@ static struct platform_device tmu1_device = {
};
static struct sh_timer_config tmu2_platform_data = {
.name = "TMU2",
.channel_offset = 0x1c,
.timer_bit = 2,
.clk = "peripheral_clk",
};
static struct resource tmu2_resources[] = {
[0] = {
.name = "TMU2",
.start = TMU2_BASE,
.end = TMU2_BASE + 0xc - 1,
.flags = IORESOURCE_MEM,