sh: Support for L2 cache on newer SH-4A CPUs.
This implements preliminary support for the L2 caches found on newer SH-4A CPUs. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@@ -416,7 +416,7 @@ const char *get_cpu_subtype(void)
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/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
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static const char *cpu_flags[] = {
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"none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
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"ptea", "llsc", NULL
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"ptea", "llsc", "l2", NULL
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};
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static void show_cpuflags(struct seq_file *m)
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@@ -480,6 +480,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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show_cacheinfo(m, "dcache", boot_cpu_data.dcache);
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}
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/* Optional secondary cache */
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if (boot_cpu_data.flags & CPU_HAS_L2_CACHE)
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show_cacheinfo(m, "scache", boot_cpu_data.scache);
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seq_printf(m, "bogomips\t: %lu.%02lu\n",
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boot_cpu_data.loops_per_jiffy/(500000/HZ),
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(boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100);
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