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sh: Support for L2 cache on newer SH-4A CPUs.

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This implements preliminary support for the L2 caches found
on newer SH-4A CPUs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
2006-09-27 18:27:43 +09:00
parent 9d549a7d8e
commit 72c35543f8
4 changed files with 57 additions and 6 deletions
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include/asm-sh/cpu-features.h
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@@ -19,5 +19,6 @@
#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
#define CPU_HAS_PTEA 0x0020 /* PTEA register */
#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */
#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
#endif /* __ASM_SH_CPU_FEATURES_H */