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[ARM] 2969/1: miscellaneous whitespace cleanup

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Patch from George G. Davis

Fix leading, trailing and other miscellaneous whitespace issues
in arch/arm/kernel/alignment.c.

Signed-off-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
George G. Davis
2005-10-12 19:58:10 +01:00
committed by Russell King
parent cd26f45bfc
commit 737d0bb770
1 changed files with 22 additions and 22 deletions
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44
arch/arm/mm/alignment.c
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@@ -111,7 +111,7 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
} }
static int proc_alignment_write(struct file *file, const char __user *buffer, static int proc_alignment_write(struct file *file, const char __user *buffer,
unsigned long count, void *data) unsigned long count, void *data)
{ {
char mode; char mode;
@@ -119,7 +119,7 @@ static int proc_alignment_write(struct file *file, const char __user *buffer,
if (get_user(mode, buffer)) if (get_user(mode, buffer))
return -EFAULT; return -EFAULT;
if (mode >= '0' && mode <= '5') if (mode >= '0' && mode <= '5')
ai_usermode = mode - '0'; ai_usermode = mode - '0';
} }
return count; return count;
} }
@@ -262,7 +262,7 @@ union offset_union {
goto fault; \ goto fault; \
} while (0) } while (0)
#define put32_unaligned_check(val,addr) \ #define put32_unaligned_check(val,addr) \
__put32_unaligned_check("strb", val, addr) __put32_unaligned_check("strb", val, addr)
#define put32t_unaligned_check(val,addr) \ #define put32t_unaligned_check(val,addr) \
@@ -306,19 +306,19 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
return TYPE_LDST; return TYPE_LDST;
user: user:
if (LDST_L_BIT(instr)) { if (LDST_L_BIT(instr)) {
unsigned long val; unsigned long val;
get16t_unaligned_check(val, addr); get16t_unaligned_check(val, addr);
/* signed half-word? */ /* signed half-word? */
if (instr & 0x40) if (instr & 0x40)
val = (signed long)((signed short) val); val = (signed long)((signed short) val);
regs->uregs[rd] = val; regs->uregs[rd] = val;
} else } else
put16t_unaligned_check(regs->uregs[rd], addr); put16t_unaligned_check(regs->uregs[rd], addr);
return TYPE_LDST; return TYPE_LDST;
fault: fault:
return TYPE_FAULT; return TYPE_FAULT;
@@ -342,11 +342,11 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
unsigned long val; unsigned long val;
get32_unaligned_check(val, addr); get32_unaligned_check(val, addr);
regs->uregs[rd] = val; regs->uregs[rd] = val;
get32_unaligned_check(val, addr+4); get32_unaligned_check(val, addr + 4);
regs->uregs[rd+1] = val; regs->uregs[rd + 1] = val;
} else { } else {
put32_unaligned_check(regs->uregs[rd], addr); put32_unaligned_check(regs->uregs[rd], addr);
put32_unaligned_check(regs->uregs[rd+1], addr+4); put32_unaligned_check(regs->uregs[rd + 1], addr + 4);
} }
return TYPE_LDST; return TYPE_LDST;
@@ -356,11 +356,11 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
unsigned long val; unsigned long val;
get32t_unaligned_check(val, addr); get32t_unaligned_check(val, addr);
regs->uregs[rd] = val; regs->uregs[rd] = val;
get32t_unaligned_check(val, addr+4); get32t_unaligned_check(val, addr + 4);
regs->uregs[rd+1] = val; regs->uregs[rd + 1] = val;
} else { } else {
put32t_unaligned_check(regs->uregs[rd], addr); put32t_unaligned_check(regs->uregs[rd], addr);
put32t_unaligned_check(regs->uregs[rd+1], addr+4); put32t_unaligned_check(regs->uregs[rd + 1], addr + 4);
} }
return TYPE_LDST; return TYPE_LDST;
@@ -443,7 +443,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
if (LDST_P_EQ_U(instr)) /* U = P */ if (LDST_P_EQ_U(instr)) /* U = P */
eaddr += 4; eaddr += 4;
/* /*
* For alignment faults on the ARM922T/ARM920T the MMU makes * For alignment faults on the ARM922T/ARM920T the MMU makes
* the FSR (and hence addr) equal to the updated base address * the FSR (and hence addr) equal to the updated base address
* of the multiple access rather than the restored value. * of the multiple access rather than the restored value.
@@ -570,7 +570,7 @@ thumb2arm(u16 tinstr)
/* 6.5.1 Format 3: */ /* 6.5.1 Format 3: */
case 0x4800 >> 11: /* 7.1.28 LDR(3) */ case 0x4800 >> 11: /* 7.1.28 LDR(3) */
/* NOTE: This case is not technically possible. We're /* NOTE: This case is not technically possible. We're
* loading 32-bit memory data via PC relative * loading 32-bit memory data via PC relative
* addressing mode. So we can and should eliminate * addressing mode. So we can and should eliminate
* this case. But I'll leave it here for now. * this case. But I'll leave it here for now.
*/ */
@@ -642,7 +642,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
if (fault) { if (fault) {
type = TYPE_FAULT; type = TYPE_FAULT;
goto bad_or_fault; goto bad_or_fault;
} }
if (user_mode(regs)) if (user_mode(regs))