[MIPS] Routerboard 532: Support for base system
Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
158
arch/mips/rb532/prom.c
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158
arch/mips/rb532/prom.c
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/*
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* RouterBoard 500 specific prom routines
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*
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* Copyright (C) 2003, Peter Sadik <peter.sadik@idt.com>
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* Copyright (C) 2005-2006, P.Christeas <p_christ@hol.gr>
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* Copyright (C) 2007, Gabor Juhos <juhosg@openwrt.org>
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* Felix Fietkau <nbd@openwrt.org>
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* Florian Fainelli <florian@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/console.h>
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#include <linux/bootmem.h>
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#include <linux/ioport.h>
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#include <linux/blkdev.h>
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#include <asm/bootinfo.h>
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#include <asm/mach-rc32434/ddr.h>
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#include <asm/mach-rc32434/prom.h>
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extern void __init setup_serial_port(void);
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unsigned int idt_cpu_freq = 132000000;
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EXPORT_SYMBOL(idt_cpu_freq);
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unsigned int gpio_bootup_state;
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EXPORT_SYMBOL(gpio_bootup_state);
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static struct resource ddr_reg[] = {
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{
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.name = "ddr-reg",
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.start = DDR0_PHYS_ADDR,
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.end = DDR0_PHYS_ADDR + sizeof(struct ddr_ram),
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.flags = IORESOURCE_MEM,
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}
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};
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void __init prom_free_prom_memory(void)
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{
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/* No prom memory to free */
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}
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static inline int match_tag(char *arg, const char *tag)
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{
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return strncmp(arg, tag, strlen(tag)) == 0;
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}
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static inline unsigned long tag2ul(char *arg, const char *tag)
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{
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char *num;
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num = arg + strlen(tag);
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return simple_strtoul(num, 0, 10);
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}
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void __init prom_setup_cmdline(void)
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{
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char cmd_line[CL_SIZE];
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char *cp, *board;
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int prom_argc;
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char **prom_argv, **prom_envp;
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int i;
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prom_argc = fw_arg0;
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prom_argv = (char **) fw_arg1;
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prom_envp = (char **) fw_arg2;
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cp = cmd_line;
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/* Note: it is common that parameters start
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* at argv[1] and not argv[0],
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* however, our elf loader starts at [0] */
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for (i = 0; i < prom_argc; i++) {
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if (match_tag(prom_argv[i], FREQ_TAG)) {
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idt_cpu_freq = tag2ul(prom_argv[i], FREQ_TAG);
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continue;
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}
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#ifdef IGNORE_CMDLINE_MEM
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/* parses out the "mem=xx" arg */
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if (match_tag(prom_argv[i], MEM_TAG))
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continue;
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#endif
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if (i > 0)
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*(cp++) = ' ';
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if (match_tag(prom_argv[i], BOARD_TAG)) {
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board = prom_argv[i] + strlen(BOARD_TAG);
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if (match_tag(board, BOARD_RB532A))
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mips_machtype = MACH_MIKROTIK_RB532A;
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else
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mips_machtype = MACH_MIKROTIK_RB532;
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}
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if (match_tag(prom_argv[i], GPIO_TAG))
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gpio_bootup_state = tag2ul(prom_argv[i], GPIO_TAG);
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strcpy(cp, prom_argv[i]);
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cp += strlen(prom_argv[i]);
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}
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*(cp++) = ' ';
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i = strlen(arcs_cmdline);
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if (i > 0) {
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*(cp++) = ' ';
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strcpy(cp, arcs_cmdline);
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cp += strlen(arcs_cmdline);
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}
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if (gpio_bootup_state & 0x02)
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strcpy(cp, GPIO_INIT_NOBUTTON);
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else
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strcpy(cp, GPIO_INIT_BUTTON);
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cmd_line[CL_SIZE-1] = '\0';
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strcpy(arcs_cmdline, cmd_line);
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}
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void __init prom_init(void)
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{
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struct ddr_ram __iomem *ddr;
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phys_t memsize;
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phys_t ddrbase;
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ddr = ioremap_nocache(ddr_reg[0].start,
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ddr_reg[0].end - ddr_reg[0].start);
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if (!ddr) {
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printk(KERN_ERR "Unable to remap DDR register\n");
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return;
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}
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ddrbase = (phys_t)&ddr->ddrbase;
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memsize = (phys_t)&ddr->ddrmask;
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memsize = 0 - memsize;
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prom_setup_cmdline();
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/* give all RAM to boot allocator,
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* except for the first 0x400 and the last 0x200 bytes */
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add_memory_region(ddrbase + 0x400, memsize - 0x600, BOOT_MEM_RAM);
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}
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