ucc_geth: Fix interrupt coalescing size and alignment
The rx interrupt coalescing table alignment was "guessed" to be 4, but should be 64. The size should be 8 * number of queues + 4. Verified in the MPC8323E manual. Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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Jeff Garzik
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702ff12ce7
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7563907eb8
@@ -867,8 +867,7 @@ struct ucc_geth_hardware_statistics {
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#define UCC_GETH_SCHEDULER_ALIGNMENT 4 /* This is a guess */
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#define UCC_GETH_TX_STATISTICS_ALIGNMENT 4 /* This is a guess */
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#define UCC_GETH_RX_STATISTICS_ALIGNMENT 4 /* This is a guess */
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#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 4 /* This is a
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guess */
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#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 64
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#define UCC_GETH_RX_BD_QUEUES_ALIGNMENT 8 /* This is a guess */
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#define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT 128 /* This is a guess */
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#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4 /* This
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