ARM: lpc32xx: allow multiplatform build

All preparation work is done, so the platform can finally
be moved into ARCH_MULTIPLATFORM. This requires a small
change to the defconfig file to enable the platform.

Link: https://lore.kernel.org/r/20190809144043.476786-14-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-08-09 16:40:39 +02:00
parent d353291003
commit 75bf1bd7d2
4 changed files with 14 additions and 63 deletions

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@ -478,21 +478,6 @@ config ARCH_W90X900
<http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
config ARCH_LPC32XX
bool "NXP LPC32XX"
select ARM_AMBA
select CLKDEV_LOOKUP
select CLKSRC_LPC32XX
select COMMON_CLK
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_MULTI_HANDLER
select GPIOLIB
select SPARSE_IRQ
select USE_OF
help
Support for the NXP LPC32XX family of processors
config ARCH_PXA
bool "PXA2xx/PXA3xx-based"
depends on MMU
@ -746,6 +731,8 @@ source "arch/arm/mach-keystone/Kconfig"
source "arch/arm/mach-ks8695/Kconfig"
source "arch/arm/mach-lpc32xx/Kconfig"
source "arch/arm/mach-mediatek/Kconfig"
source "arch/arm/mach-meson/Kconfig"

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@ -12,6 +12,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_LPC32XX=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0

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@ -0,0 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-only
config ARCH_LPC32XX
bool "NXP LPC32XX"
depends on ARCH_MULTI_V5
select ARM_AMBA
select CLKSRC_LPC32XX
select CPU_ARM926T
select GPIOLIB
help
Support for the NXP LPC32XX family of processors

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@ -1,48 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* arch/arm/mach-lpc32xx/include/mach/uncompress.h
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
* Copyright (C) 2010 NXP Semiconductors
*/
#ifndef __ASM_ARM_ARCH_UNCOMPRESS_H
#define __ASM_ARM_ARCH_UNCOMPRESS_H
#include <linux/io.h>
/*
* Uncompress output is hardcoded to standard UART 5
*/
#define UART_FIFO_CTL_TX_RESET (1 << 2)
#define UART_STATUS_TX_MT (1 << 6)
#define LPC32XX_UART5_BASE 0x40090000
#define _UARTREG(x) (void __iomem *)(LPC32XX_UART5_BASE + (x))
#define LPC32XX_UART_DLLFIFO_O 0x00
#define LPC32XX_UART_IIRFCR_O 0x08
#define LPC32XX_UART_LSR_O 0x14
static inline void putc(int ch)
{
/* Wait for transmit FIFO to empty */
while ((__raw_readl(_UARTREG(LPC32XX_UART_LSR_O)) &
UART_STATUS_TX_MT) == 0)
;
__raw_writel((u32) ch, _UARTREG(LPC32XX_UART_DLLFIFO_O));
}
static inline void flush(void)
{
__raw_writel(__raw_readl(_UARTREG(LPC32XX_UART_IIRFCR_O)) |
UART_FIFO_CTL_TX_RESET, _UARTREG(LPC32XX_UART_IIRFCR_O));
}
/* NULL functions; we don't presently need them */
#define arch_decomp_setup()
#endif