MIPS: make cp0 counter clocksource/event usable as fallback.

The current mips clock build infrastructure lets a system only use
either the MIPS cp0 counter or a SoC specific timer as a clocksource /
clockevent device.

This patch renames the core cp0 counter clocksource / clockevent functions
from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to
call these renamed functions instead.

Chips which can detect whether it is safe to use a chip-specific timer
can now fall back on the cp0 counter if necessary and possible
(e.g. Alchemy with a follow-on patch).

Existing behaviour is not changed in any way.

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
2008-12-21 09:26:22 +01:00
committed by Ralf Baechle
parent 074cf65670
commit 779e7d41ad
5 changed files with 28 additions and 12 deletions

View File

@ -50,27 +50,35 @@ extern int (*perf_irq)(void);
/*
* Initialize the calling CPU's compare interrupt as clockevent device
*/
#ifdef CONFIG_CEVT_R4K
extern int mips_clockevent_init(void);
#ifdef CONFIG_CEVT_R4K_LIB
extern unsigned int __weak get_c0_compare_int(void);
#else
extern int r4k_clockevent_init(void);
#endif
static inline int mips_clockevent_init(void)
{
#ifdef CONFIG_CEVT_R4K
return r4k_clockevent_init();
#else
return -ENXIO;
}
#endif
}
/*
* Initialize the count register as a clocksource
*/
#ifdef CONFIG_CSRC_R4K
extern int init_mips_clocksource(void);
#else
#ifdef CONFIG_CSRC_R4K_LIB
extern int init_r4k_clocksource(void);
#endif
static inline int init_mips_clocksource(void)
{
#ifdef CONFIG_CSRC_R4K
return init_r4k_clocksource();
#else
return 0;
}
#endif
}
extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
extern void clockevent_set_clock(struct clock_event_device *cd,