MIPS: make cp0 counter clocksource/event usable as fallback.
The current mips clock build infrastructure lets a system only use either the MIPS cp0 counter or a SoC specific timer as a clocksource / clockevent device. This patch renames the core cp0 counter clocksource / clockevent functions from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to call these renamed functions instead. Chips which can detect whether it is safe to use a chip-specific timer can now fall back on the cp0 counter if necessary and possible (e.g. Alchemy with a follow-on patch). Existing behaviour is not changed in any way. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
committed by
Ralf Baechle
parent
074cf65670
commit
779e7d41ad
@ -50,27 +50,35 @@ extern int (*perf_irq)(void);
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/*
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* Initialize the calling CPU's compare interrupt as clockevent device
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*/
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#ifdef CONFIG_CEVT_R4K
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extern int mips_clockevent_init(void);
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#ifdef CONFIG_CEVT_R4K_LIB
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extern unsigned int __weak get_c0_compare_int(void);
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#else
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extern int r4k_clockevent_init(void);
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#endif
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static inline int mips_clockevent_init(void)
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{
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#ifdef CONFIG_CEVT_R4K
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return r4k_clockevent_init();
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#else
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return -ENXIO;
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}
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#endif
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}
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/*
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* Initialize the count register as a clocksource
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*/
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#ifdef CONFIG_CSRC_R4K
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extern int init_mips_clocksource(void);
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#else
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#ifdef CONFIG_CSRC_R4K_LIB
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extern int init_r4k_clocksource(void);
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#endif
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static inline int init_mips_clocksource(void)
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{
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#ifdef CONFIG_CSRC_R4K
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return init_r4k_clocksource();
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#else
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return 0;
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}
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#endif
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}
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extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
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extern void clockevent_set_clock(struct clock_event_device *cd,
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