drm/radeon/kms: don't swap PCIEGART PTEs in VRAM.
On powerpc, since we aren't using any hw swappers, this will get flipped around by default in hw. tested on a G5 + rv515. Signed-off-by: Dave Airlie <airlied@redhat.com>
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@@ -154,7 +154,10 @@ int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
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addr = (lower_32_bits(addr) >> 8) |
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addr = (lower_32_bits(addr) >> 8) |
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((upper_32_bits(addr) & 0xff) << 24) |
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((upper_32_bits(addr) & 0xff) << 24) |
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0xc;
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0xc;
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writel(cpu_to_le32(addr), ((void __iomem *)ptr) + (i * 4));
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/* on x86 we want this to be CPU endian, on powerpc
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* on powerpc without HW swappers, it'll get swapped on way
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* into VRAM - so no need for cpu_to_le32 on VRAM tables */
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writel(addr, ((void __iomem *)ptr) + (i * 4));
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return 0;
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return 0;
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}
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}
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