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drm/i915: Clear GPU read domains on reset

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Clear the GPU read domain for the inactive objects on a reset so that
they are correctly invalidated on reuse.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
2010-09-19 12:31:36 +01:00
parent 9375e446e7
commit 77f0123022
3 changed files with 19 additions and 0 deletions
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5
drivers/gpu/drm/i915/i915_drv.c
View File

@@ -391,6 +391,11 @@ int i965_reset(struct drm_device *dev, u8 flags)
*/ */
i915_gem_reset_flushing_list(dev); i915_gem_reset_flushing_list(dev);
/* Move everything out of the GPU domains to ensure we do any
* necessary invalidation upon reuse.
*/
i915_gem_reset_inactive_gpu_domains(dev);
/* /*
* Set the domains we want to reset (GRDOM/bits 2 and 3) as * Set the domains we want to reset (GRDOM/bits 2 and 3) as
* well as the reset bit (GR/bit 0). Setting the GR bit * well as the reset bit (GR/bit 0). Setting the GR bit

1
drivers/gpu/drm/i915/i915_drv.h
View File

@@ -998,6 +998,7 @@ int i915_gem_object_put_fence_reg(struct drm_gem_object *obj,
bool interruptible); bool interruptible);
void i915_gem_retire_requests(struct drm_device *dev); void i915_gem_retire_requests(struct drm_device *dev);
void i915_gem_reset_flushing_list(struct drm_device *dev); void i915_gem_reset_flushing_list(struct drm_device *dev);
void i915_gem_reset_inactive_gpu_domains(struct drm_device *dev);
void i915_gem_clflush_object(struct drm_gem_object *obj); void i915_gem_clflush_object(struct drm_gem_object *obj);
int i915_gem_object_set_domain(struct drm_gem_object *obj, int i915_gem_object_set_domain(struct drm_gem_object *obj,
uint32_t read_domains, uint32_t read_domains,

13
drivers/gpu/drm/i915/i915_gem.c
View File

@@ -1699,6 +1699,19 @@ void i915_gem_reset_flushing_list(struct drm_device *dev)
} }
} }
void i915_gem_reset_inactive_gpu_domains(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_i915_gem_object *obj_priv;
list_for_each_entry(obj_priv,
&dev_priv->mm.inactive_list,
list)
{
obj_priv->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
}
}
/** /**
* This function clears the request list as sequence numbers are passed. * This function clears the request list as sequence numbers are passed.
*/ */