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ARM: OMAP4: Update the GPIO support

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This patch adds GPIO support on OMAP4430 development platform.

Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com>
This commit is contained in:
Syed Rafiuddin
2009-07-28 18:57:30 +05:30
committed by Santosh Shilimkar
parent 085b54d99b
commit 78a1a6d341
1 changed files with 198 additions and 51 deletions
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249
arch/arm/plat-omap/gpio.c
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@@ -138,6 +138,32 @@
#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 #define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
#define OMAP24XX_GPIO_SETDATAOUT 0x0094 #define OMAP24XX_GPIO_SETDATAOUT 0x0094
#define OMAP4_GPIO_REVISION 0x0000
#define OMAP4_GPIO_SYSCONFIG 0x0010
#define OMAP4_GPIO_EOI 0x0020
#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
#define OMAP4_GPIO_IRQSTATUS0 0x002c
#define OMAP4_GPIO_IRQSTATUS1 0x0030
#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
#define OMAP4_GPIO_IRQWAKEN0 0x0044
#define OMAP4_GPIO_IRQWAKEN1 0x0048
#define OMAP4_GPIO_SYSSTATUS 0x0104
#define OMAP4_GPIO_CTRL 0x0130
#define OMAP4_GPIO_OE 0x0134
#define OMAP4_GPIO_DATAIN 0x0138
#define OMAP4_GPIO_DATAOUT 0x013c
#define OMAP4_GPIO_LEVELDETECT0 0x0140
#define OMAP4_GPIO_LEVELDETECT1 0x0144
#define OMAP4_GPIO_RISINGDETECT 0x0148
#define OMAP4_GPIO_FALLINGDETECT 0x014c
#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
#define OMAP4_GPIO_CLEARDATAOUT 0x0190
#define OMAP4_GPIO_SETDATAOUT 0x0194
/* /*
* omap34xx specific GPIO registers * omap34xx specific GPIO registers
*/ */
@@ -386,11 +412,15 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
reg += OMAP850_GPIO_DIR_CONTROL; reg += OMAP850_GPIO_DIR_CONTROL;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE; reg += OMAP24XX_GPIO_OE;
break; break;
#endif
#if defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX:
reg += OMAP4_GPIO_OE;
break;
#endif #endif
default: default:
WARN_ON(1); WARN_ON(1);
@@ -459,8 +489,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
l &= ~(1 << gpio); l &= ~(1 << gpio);
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
if (enable) if (enable)
reg += OMAP24XX_GPIO_SETDATAOUT; reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -468,6 +497,15 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
reg += OMAP24XX_GPIO_CLEARDATAOUT; reg += OMAP24XX_GPIO_CLEARDATAOUT;
l = 1 << gpio; l = 1 << gpio;
break; break;
#endif
#ifdef CONFIG_ARCH_OMAP4
case METHOD_GPIO_24XX:
if (enable)
reg += OMAP4_GPIO_SETDATAOUT;
else
reg += OMAP4_GPIO_CLEARDATAOUT;
l = 1 << gpio;
break;
#endif #endif
default: default:
WARN_ON(1); WARN_ON(1);
@@ -511,11 +549,15 @@ static int __omap_get_gpio_datain(int gpio)
reg += OMAP850_GPIO_DATA_INPUT; reg += OMAP850_GPIO_DATA_INPUT;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAIN; reg += OMAP24XX_GPIO_DATAIN;
break; break;
#endif
#ifdef CONFIG_ARCH_OMAP4
case METHOD_GPIO_24XX:
reg += OMAP4_GPIO_DATAIN;
break;
#endif #endif
default: default:
return -EINVAL; return -EINVAL;
@@ -544,7 +586,11 @@ void omap_set_gpio_debounce(int gpio, int enable)
bank = get_gpio_bank(gpio); bank = get_gpio_bank(gpio);
reg = bank->base; reg = bank->base;
#ifdef CONFIG_ARCH_OMAP4
reg += OMAP4_GPIO_DEBOUNCENABLE;
#else
reg += OMAP24XX_GPIO_DEBOUNCE_EN; reg += OMAP24XX_GPIO_DEBOUNCE_EN;
#endif
spin_lock_irqsave(&bank->lock, flags); spin_lock_irqsave(&bank->lock, flags);
val = __raw_readl(reg); val = __raw_readl(reg);
@@ -581,7 +627,11 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
reg = bank->base; reg = bank->base;
enc_time &= 0xff; enc_time &= 0xff;
#ifdef CONFIG_ARCH_OMAP4
reg += OMAP4_GPIO_DEBOUNCINGTIME;
#else
reg += OMAP24XX_GPIO_DEBOUNCE_VAL; reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
#endif
__raw_writel(enc_time, reg); __raw_writel(enc_time, reg);
} }
EXPORT_SYMBOL(omap_set_gpio_debounce_time); EXPORT_SYMBOL(omap_set_gpio_debounce_time);
@@ -593,23 +643,46 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
{ {
void __iomem *base = bank->base; void __iomem *base = bank->base;
u32 gpio_bit = 1 << gpio; u32 gpio_bit = 1 << gpio;
u32 val;
MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, if (cpu_is_omap44xx()) {
trigger & IRQ_TYPE_LEVEL_LOW); MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit, trigger & IRQ_TYPE_LEVEL_LOW);
trigger & IRQ_TYPE_LEVEL_HIGH); MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit, trigger & IRQ_TYPE_LEVEL_HIGH);
trigger & IRQ_TYPE_EDGE_RISING); MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, trigger & IRQ_TYPE_EDGE_RISING);
trigger & IRQ_TYPE_EDGE_FALLING); MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
} else {
MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
trigger & IRQ_TYPE_LEVEL_LOW);
MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
trigger & IRQ_TYPE_LEVEL_HIGH);
MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_RISING);
MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
trigger & IRQ_TYPE_EDGE_FALLING);
}
if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
if (trigger != 0) if (cpu_is_omap44xx()) {
__raw_writel(1 << gpio, bank->base if (trigger != 0)
__raw_writel(1 << gpio, bank->base+
OMAP4_GPIO_IRQWAKEN0);
else {
val = __raw_readl(bank->base +
OMAP4_GPIO_IRQWAKEN0);
__raw_writel(val & (~(1 << gpio)), bank->base +
OMAP4_GPIO_IRQWAKEN0);
}
} else {
if (trigger != 0)
__raw_writel(1 << gpio, bank->base
+ OMAP24XX_GPIO_SETWKUENA); + OMAP24XX_GPIO_SETWKUENA);
else else
__raw_writel(1 << gpio, bank->base __raw_writel(1 << gpio, bank->base
+ OMAP24XX_GPIO_CLEARWKUENA); + OMAP24XX_GPIO_CLEARWKUENA);
}
} else { } else {
if (trigger != 0) if (trigger != 0)
bank->enabled_non_wakeup_gpios |= gpio_bit; bank->enabled_non_wakeup_gpios |= gpio_bit;
@@ -617,9 +690,15 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
bank->enabled_non_wakeup_gpios &= ~gpio_bit; bank->enabled_non_wakeup_gpios &= ~gpio_bit;
} }
bank->level_mask = if (cpu_is_omap44xx()) {
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) | bank->level_mask =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
__raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
} else {
bank->level_mask =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
}
} }
#endif #endif
@@ -783,11 +862,15 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
reg += OMAP850_GPIO_INT_STATUS; reg += OMAP850_GPIO_INT_STATUS;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQSTATUS1; reg += OMAP24XX_GPIO_IRQSTATUS1;
break; break;
#endif
#if defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX:
reg += OMAP4_GPIO_IRQSTATUS0;
break;
#endif #endif
default: default:
WARN_ON(1); WARN_ON(1);
@@ -798,12 +881,16 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
/* Workaround for clearing DSP GPIO interrupts to allow retention */ /* Workaround for clearing DSP GPIO interrupts to allow retention */
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) #endif
#if defined(CONFIG_ARCH_OMAP4)
reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
#endif
if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
__raw_writel(gpio_mask, reg); __raw_writel(gpio_mask, reg);
/* Flush posted write for the irq status to avoid spurious interrupts */ /* Flush posted write for the irq status to avoid spurious interrupts */
__raw_readl(reg); __raw_readl(reg);
#endif }
} }
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@ -853,12 +940,17 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
inv = 1; inv = 1;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQENABLE1; reg += OMAP24XX_GPIO_IRQENABLE1;
mask = 0xffffffff; mask = 0xffffffff;
break; break;
#endif
#if defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX:
reg += OMAP4_GPIO_IRQSTATUSSET0;
mask = 0xffffffff;
break;
#endif #endif
default: default:
WARN_ON(1); WARN_ON(1);
@@ -927,8 +1019,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
l |= gpio_mask; l |= gpio_mask;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
if (enable) if (enable)
reg += OMAP24XX_GPIO_SETIRQENABLE1; reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@ -936,6 +1027,15 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
reg += OMAP24XX_GPIO_CLEARIRQENABLE1; reg += OMAP24XX_GPIO_CLEARIRQENABLE1;
l = gpio_mask; l = gpio_mask;
break; break;
#endif
#ifdef CONFIG_ARCH_OMAP4
case METHOD_GPIO_24XX:
if (enable)
reg += OMAP4_GPIO_IRQSTATUSSET0;
else
reg += OMAP4_GPIO_IRQSTATUSCLR0;
l = gpio_mask;
break;
#endif #endif
default: default:
WARN_ON(1); WARN_ON(1);
@@ -1112,10 +1212,13 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (bank->method == METHOD_GPIO_850) if (bank->method == METHOD_GPIO_850)
isr_reg = bank->base + OMAP850_GPIO_INT_STATUS; isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
if (bank->method == METHOD_GPIO_24XX) if (bank->method == METHOD_GPIO_24XX)
isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
#endif
#if defined(CONFIG_ARCH_OMAP4)
if (bank->method == METHOD_GPIO_24XX)
isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
#endif #endif
while(1) { while(1) {
u32 isr_saved, level_mask = 0; u32 isr_saved, level_mask = 0;
@@ -1547,7 +1650,7 @@ static int __init _omap_gpio_init(void)
gpio_bank_count = OMAP34XX_NR_GPIOS; gpio_bank_count = OMAP34XX_NR_GPIOS;
gpio_bank = gpio_bank_44xx; gpio_bank = gpio_bank_44xx;
rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n", printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
(rev >> 4) & 0x0f, rev & 0x0f); (rev >> 4) & 0x0f, rev & 0x0f);
} }
@@ -1581,7 +1684,16 @@ static int __init _omap_gpio_init(void)
static const u32 non_wakeup_gpios[] = { static const u32 non_wakeup_gpios[] = {
0xe203ffc0, 0x08700040 0xe203ffc0, 0x08700040
}; };
if (cpu_is_omap44xx()) {
__raw_writel(0xffffffff, bank->base +
OMAP4_GPIO_IRQSTATUSCLR0);
__raw_writew(0x0015, bank->base +
OMAP4_GPIO_SYSCONFIG);
__raw_writel(0x00000000, bank->base +
OMAP4_GPIO_DEBOUNCENABLE);
/* Initialize interface clock ungated, module enabled */
__raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
} else {
__raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
__raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
__raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
@@ -1589,12 +1701,12 @@ static int __init _omap_gpio_init(void)
/* Initialize interface clock ungated, module enabled */ /* Initialize interface clock ungated, module enabled */
__raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
}
if (i < ARRAY_SIZE(non_wakeup_gpios)) if (i < ARRAY_SIZE(non_wakeup_gpios))
bank->non_wakeup_gpios = non_wakeup_gpios[i]; bank->non_wakeup_gpios = non_wakeup_gpios[i];
gpio_count = 32; gpio_count = 32;
} }
#endif #endif
/* REVISIT eventually switch from OMAP-specific gpio structs /* REVISIT eventually switch from OMAP-specific gpio structs
* over to the generic ones * over to the generic ones
*/ */
@@ -1680,13 +1792,19 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
break; break;
#endif
#ifdef CONFIG_ARCH_OMAP4
case METHOD_GPIO_24XX:
wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
break;
#endif #endif
default: default:
continue; continue;
@@ -1722,12 +1840,17 @@ static int omap_gpio_resume(struct sys_device *dev)
wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
break; break;
#endif #endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_24XX: case METHOD_GPIO_24XX:
wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
break; break;
#endif
#ifdef CONFIG_ARCH_OMAP4
case METHOD_GPIO_24XX:
wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
break;
#endif #endif
default: default:
continue; continue;
@@ -1772,20 +1895,28 @@ void omap2_gpio_prepare_for_retention(void)
if (!(bank->enabled_non_wakeup_gpios)) if (!(bank->enabled_non_wakeup_gpios))
continue; continue;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
#endif
#ifdef CONFIG_ARCH_OMAP4
bank->saved_datain = __raw_readl(bank->base +
OMAP4_GPIO_DATAIN);
l1 = __raw_readl(bank->base + OMAP4_GPIO_FALLINGDETECT);
l2 = __raw_readl(bank->base + OMAP4_GPIO_RISINGDETECT);
#endif #endif
bank->saved_fallingdetect = l1; bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2; bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios; l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios; l2 &= ~bank->enabled_non_wakeup_gpios;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
__raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
__raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
#endif
#ifdef CONFIG_ARCH_OMAP4
__raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
__raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
#endif #endif
c++; c++;
} }
@@ -1808,33 +1939,49 @@ void omap2_gpio_resume_after_retention(void)
if (!(bank->enabled_non_wakeup_gpios)) if (!(bank->enabled_non_wakeup_gpios))
continue; continue;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
__raw_writel(bank->saved_fallingdetect, __raw_writel(bank->saved_fallingdetect,
bank->base + OMAP24XX_GPIO_FALLINGDETECT); bank->base + OMAP24XX_GPIO_FALLINGDETECT);
__raw_writel(bank->saved_risingdetect, __raw_writel(bank->saved_risingdetect,
bank->base + OMAP24XX_GPIO_RISINGDETECT); bank->base + OMAP24XX_GPIO_RISINGDETECT);
l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
#endif
#ifdef CONFIG_ARCH_OMAP4
__raw_writel(bank->saved_fallingdetect,
bank->base + OMAP4_GPIO_FALLINGDETECT);
__raw_writel(bank->saved_risingdetect,
bank->base + OMAP4_GPIO_RISINGDETECT);
l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
#endif #endif
/* Check if any of the non-wakeup interrupt GPIOs have changed /* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is * state. If so, generate an IRQ by software. This is
* horribly racy, but it's the best we can do to work around * horribly racy, but it's the best we can do to work around
* this silicon bug. */ * this silicon bug. */
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
defined(CONFIG_ARCH_OMAP4)
l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
#endif
l ^= bank->saved_datain; l ^= bank->saved_datain;
l &= bank->non_wakeup_gpios; l &= bank->non_wakeup_gpios;
if (l) { if (l) {
u32 old0, old1; u32 old0, old1;
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
defined(CONFIG_ARCH_OMAP4)
old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
__raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
__raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
#endif
#ifdef CONFIG_ARCH_OMAP4
old0 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT0);
old1 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT1);
__raw_writel(old0 | l, bank->base +
OMAP4_GPIO_LEVELDETECT0);
__raw_writel(old1 | l, bank->base +
OMAP4_GPIO_LEVELDETECT1);
__raw_writel(old0, bank->base +
OMAP4_GPIO_LEVELDETECT0);
__raw_writel(old1, bank->base +
OMAP4_GPIO_LEVELDETECT1);
#endif #endif
} }
} }