Merge branches 'x86/cleanups', 'x86/kexec', 'x86/mce2' and 'linus' into x86/core
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@@ -348,6 +348,11 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
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* flush_tlb_user() for both user and kernel mappings unless
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* the Page Global Enable (PGE) feature bit is set. */
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*dx |= 0x00002000;
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/* We also lie, and say we're family id 5. 6 or greater
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* leads to a rdmsr in early_init_intel which we can't handle.
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* Family ID is returned as bits 8-12 in ax. */
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*ax &= 0xFFFFF0FF;
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*ax |= 0x00000500;
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break;
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case 0x80000000:
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/* Futureproof this a little: if they ask how much extended
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@@ -594,19 +599,21 @@ static void __init lguest_init_IRQ(void)
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/* Some systems map "vectors" to interrupts weirdly. Lguest has
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* a straightforward 1 to 1 mapping, so force that here. */
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__get_cpu_var(vector_irq)[vector] = i;
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if (vector != SYSCALL_VECTOR) {
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set_intr_gate(vector,
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interrupt[vector-FIRST_EXTERNAL_VECTOR]);
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set_irq_chip_and_handler_name(i, &lguest_irq_controller,
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handle_level_irq,
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"level");
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}
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if (vector != SYSCALL_VECTOR)
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set_intr_gate(vector, interrupt[i]);
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}
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/* This call is required to set up for 4k stacks, where we have
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* separate stacks for hard and soft interrupts. */
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irq_ctx_init(smp_processor_id());
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}
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void lguest_setup_irq(unsigned int irq)
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{
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irq_to_desc_alloc_cpu(irq, 0);
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set_irq_chip_and_handler_name(irq, &lguest_irq_controller,
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handle_level_irq, "level");
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}
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/*
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* Time.
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*
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