lk/linux-kernel-test
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

x86: L3 cache index disable for 2.6.26, cleanups

Browse Source 
No change in functionality.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar
2008-07-21 13:34:21 +02:00
parent 8cb22bcb1f
commit 7a4983bb5f
1 changed files with 59 additions and 52 deletions
Download Patch File Download Diff File Expand all files Collapse all files

53
arch/x86/kernel/cpu/intel_cacheinfo.c
View File

@@ -253,14 +253,16 @@ static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
(ebx->split.ways_of_associativity + 1) - 1; (ebx->split.ways_of_associativity + 1) - 1;
} }
static void __cpuinit amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf) static void __cpuinit
amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf)
{ {
if (index < 3) if (index < 3)
return; return;
this_leaf->can_disable = 1; this_leaf->can_disable = 1;
} }
static int __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf) static int
__cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
{ {
union _cpuid4_leaf_eax eax; union _cpuid4_leaf_eax eax;
union _cpuid4_leaf_ebx ebx; union _cpuid4_leaf_ebx ebx;
@@ -271,9 +273,10 @@ static int __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_le
amd_cpuid4(index, &eax, &ebx, &ecx); amd_cpuid4(index, &eax, &ebx, &ecx);
if (boot_cpu_data.x86 >= 0x10) if (boot_cpu_data.x86 >= 0x10)
amd_check_l3_disable(index, this_leaf); amd_check_l3_disable(index, this_leaf);
} else {
} else
cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx); cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
}
if (eax.split.type == CACHE_TYPE_NULL) if (eax.split.type == CACHE_TYPE_NULL)
return -EIO; /* better error ? */ return -EIO; /* better error ? */
@@ -654,54 +657,58 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) {
static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
{ {
struct pci_dev *dev;
if (this_leaf->can_disable) {
int i;
ssize_t ret = 0;
int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map)); int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map));
dev = k8_northbridges[node]; struct pci_dev *dev = k8_northbridges[node];
ssize_t ret = 0;
int i;
if (!this_leaf->can_disable)
return sprintf(buf, "Feature not enabled\n");
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
unsigned int reg; unsigned int reg;
pci_read_config_dword(dev, 0x1BC + i * 4, &reg); pci_read_config_dword(dev, 0x1BC + i * 4, &reg);
ret += sprintf(buf, "%sEntry: %d\n", buf, i); ret += sprintf(buf, "%sEntry: %d\n", buf, i);
ret += sprintf(buf, "%sReads: %s\tNew Entries: %s\n", ret += sprintf(buf, "%sReads: %s\tNew Entries: %s\n",
buf, buf,
reg & 0x80000000 ? "Disabled" : "Allowed", reg & 0x80000000 ? "Disabled" : "Allowed",
reg & 0x40000000 ? "Disabled" : "Allowed"); reg & 0x40000000 ? "Disabled" : "Allowed");
ret += sprintf(buf, "%sSubCache: %x\tIndex: %x\n", buf, ret += sprintf(buf, "%sSubCache: %x\tIndex: %x\n",
(reg & 0x30000) >> 16, reg & 0xfff); buf, (reg & 0x30000) >> 16, reg & 0xfff);
} }
return ret; return ret;
}
return sprintf(buf, "Feature not enabled\n");
} }
static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, size_t count) static ssize_t
store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
size_t count)
{ {
struct pci_dev *dev;
if (this_leaf->can_disable) {
/* write the MSR value */
unsigned int ret;
unsigned int index, val;
int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map)); int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map));
dev = k8_northbridges[node]; struct pci_dev *dev = k8_northbridges[node];
unsigned int ret, index, val;
if (!this_leaf->can_disable)
return 0;
/* write the MSR value */
if (strlen(buf) > 15) if (strlen(buf) > 15)
return -EINVAL; return -EINVAL;
ret = sscanf(buf, "%x %x", &index, &val); ret = sscanf(buf, "%x %x", &index, &val);
if (ret != 2) if (ret != 2)
return -EINVAL; return -EINVAL;
if (index > 1) if (index > 1)
return -EINVAL; return -EINVAL;
val |= 0xc0000000; val |= 0xc0000000;
pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000); pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
wbinvd(); wbinvd();
pci_write_config_dword(dev, 0x1BC + index * 4, val); pci_write_config_dword(dev, 0x1BC + index * 4, val);
return 1; return 1;
}
return 0;
} }
struct _cache_attr { struct _cache_attr {