[PATCH] PPC 44x EMAC driver: add 440SPe support
For some reason, the hardware designers made the polarity of one bit in the 440SPe's PHY interface register the opposite of all other PPC 440 chips. To handle this, abstract our access to this bit and do the right thing based on the configured CPU type. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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Jeff Garzik
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@@ -34,7 +34,8 @@
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#if defined(CONFIG_405GP) || defined(CONFIG_405GPR) || defined(CONFIG_405EP) || \
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defined(CONFIG_440EP) || defined(CONFIG_NP405H)
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#define MAL_VERSION 1
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#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP)
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#elif defined(CONFIG_440GP) || defined(CONFIG_440GX) || defined(CONFIG_440SP) || \
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defined(CONFIG_440SPE)
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#define MAL_VERSION 2
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#else
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#error "Unknown SoC, please check chip manual and choose MAL 'version'"
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