mmc: Support for high speed SD cards
Modern SD cards support a clock speed of 50 MHz. Make sure we test for this capability and do the song and dance required to activate it. Activating high speed support actually modifies the TRAN_SPEED field of the CSD. But as the spec says that the cards must report 50 MHz, we might as well skip re-reading the CSD. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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@@ -50,6 +50,10 @@ struct sd_scr {
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#define SD_SCR_BUS_WIDTH_4 (1<<2)
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};
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struct sd_switch_caps {
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unsigned int hs_max_dtr;
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};
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struct mmc_host;
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/*
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@@ -66,7 +70,7 @@ struct mmc_card {
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#define MMC_STATE_BAD (1<<2) /* unrecognised device */
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#define MMC_STATE_SDCARD (1<<3) /* is an SD card */
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#define MMC_STATE_READONLY (1<<4) /* card is read-only */
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#define MMC_STATE_HIGHSPEED (1<<5) /* card is in mmc4 highspeed mode */
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#define MMC_STATE_HIGHSPEED (1<<5) /* card is in high speed mode */
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u32 raw_cid[4]; /* raw card CID */
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u32 raw_csd[4]; /* raw card CSD */
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u32 raw_scr[2]; /* raw card SCR */
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@@ -74,6 +78,7 @@ struct mmc_card {
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struct mmc_csd csd; /* card specific */
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struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */
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struct sd_scr scr; /* extra SD information */
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struct sd_switch_caps sw_caps; /* switch (CMD6) caps */
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};
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#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
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@@ -82,6 +82,7 @@
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/* class 8 */
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/* This is basically the same command as for MMC with some quirks. */
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#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
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#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
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/* Application commands */
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#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
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@@ -100,6 +101,19 @@
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* [02:00] Command Set
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*/
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/*
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* SD_SWITCH argument format:
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*
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* [31] Check (0) or switch (1)
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* [30:24] Reserved (0)
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* [23:20] Function group 6
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* [19:16] Function group 5
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* [15:12] Function group 4
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* [11:8] Function group 3
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* [7:4] Function group 2
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* [3:0] Function group 1
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*/
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/*
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MMC status in R1
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Type
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@@ -284,6 +298,14 @@ struct _mmc_csd {
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#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
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#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
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/*
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* SCR field definitions
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*/
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#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
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#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
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#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */
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/*
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* SD bus widths
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*/
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