[PATCH] make pmtmr_ioport __read_mostly
- written on init only, accessed for every timer read --> __read_mostly - fix broken sentence Signed-off-by: Andreas Mohr <andi@lisas.de> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Linus Torvalds
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a275254975
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@ -27,7 +27,7 @@
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/* The I/O port the PMTMR resides at.
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/* The I/O port the PMTMR resides at.
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* The location is detected during setup_arch(),
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* The location is detected during setup_arch(),
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* in arch/i386/kernel/acpi/boot.c */
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* in arch/i386/kernel/acpi/boot.c */
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u32 pmtmr_ioport;
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u32 pmtmr_ioport __read_mostly;
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/* value of the Power timer at last timer interrupt */
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/* value of the Power timer at last timer interrupt */
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static u32 offset_delay;
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static u32 offset_delay;
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@ -30,7 +30,7 @@
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* The location is detected during setup_arch(),
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* The location is detected during setup_arch(),
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* in arch/i386/acpi/boot.c
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* in arch/i386/acpi/boot.c
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*/
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*/
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u32 pmtmr_ioport;
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u32 pmtmr_ioport __read_mostly;
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#define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */
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#define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */
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@ -47,7 +47,7 @@ static cycle_t acpi_pm_read_verified(void)
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/*
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/*
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* It has been reported that because of various broken
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* It has been reported that because of various broken
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* chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock
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* chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock
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* source is not latched, so you must read it multiple
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* source is not latched, you must read it multiple
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* times to ensure a safe value is read:
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* times to ensure a safe value is read:
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*/
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*/
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do {
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do {
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