ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values
On OMAP2xxx chips, the register bitfields for the PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are different than those used on OMAP3/4. The order is reversed. So, for example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0 indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on OMAP3/4, 0x3 indicates 'ON'. To fix this, we treat the OMAP3/4 values as the powerdomain API values, and create new low-level powerdomain functions for the OMAP2xxx chips which translate between the OMAP2xxx values and the OMAP3/4 values. Without this patch, the conversion of the OMAP2xxx PM code to the functional powerstate code results in a non-booting kernel. Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
@@ -28,6 +28,14 @@
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#include "cm2xxx_3xxx.h"
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#include "cm2xxx_3xxx.h"
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#include "prm-regbits-24xx.h"
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#include "prm-regbits-24xx.h"
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/*
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* OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
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* these are reversed from the bits used on OMAP3+
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*/
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#define OMAP24XX_PWRDM_POWER_ON 0x0
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#define OMAP24XX_PWRDM_POWER_RET 0x1
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#define OMAP24XX_PWRDM_POWER_OFF 0x3
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/*
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/*
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* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
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* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
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* hardware register (which are specific to the OMAP2xxx SoCs) to
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* hardware register (which are specific to the OMAP2xxx SoCs) to
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@@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
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return r;
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return r;
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}
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}
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/**
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* omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
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* @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
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*
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* Return the common power state bits corresponding to the OMAP2xxx
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* hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
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*/
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static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
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{
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u8 pwrst;
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switch (omap2xxx_pwrst) {
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case OMAP24XX_PWRDM_POWER_OFF:
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pwrst = PWRDM_POWER_OFF;
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break;
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case OMAP24XX_PWRDM_POWER_RET:
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pwrst = PWRDM_POWER_RET;
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break;
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case OMAP24XX_PWRDM_POWER_ON:
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pwrst = PWRDM_POWER_ON;
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break;
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default:
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return -EINVAL;
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}
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return pwrst;
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}
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/**
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/**
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* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
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* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
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*
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*
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@@ -98,10 +134,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
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return 0;
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return 0;
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}
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}
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static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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u8 omap24xx_pwrst;
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switch (pwrst) {
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case PWRDM_POWER_OFF:
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omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
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break;
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case PWRDM_POWER_RET:
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omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
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break;
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case PWRDM_POWER_ON:
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omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
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break;
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default:
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return -EINVAL;
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}
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omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
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(omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
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return 0;
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}
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static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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u8 omap2xxx_pwrst;
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omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTCTRL,
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OMAP_POWERSTATE_MASK);
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return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
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}
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static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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u8 omap2xxx_pwrst;
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omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTST,
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OMAP_POWERSTATEST_MASK);
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return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
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}
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struct pwrdm_ops omap2_pwrdm_operations = {
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struct pwrdm_ops omap2_pwrdm_operations = {
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.pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
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.pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
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.pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
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.pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
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.pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
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.pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
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.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
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.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
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.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
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.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
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.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
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.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
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@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
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/* Powerdomain low-level functions */
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/* Powerdomain low-level functions */
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/* Common functions across OMAP2 and OMAP3 */
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/* Common functions across OMAP2 and OMAP3 */
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int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
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(pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
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return 0;
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}
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int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTCTRL,
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OMAP_POWERSTATE_MASK);
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}
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int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTST,
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OMAP_POWERSTATEST_MASK);
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}
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int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
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int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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u8 pwrst)
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{
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{
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@@ -278,6 +278,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
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/* Powerdomain low-level functions */
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/* Powerdomain low-level functions */
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static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
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(pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
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return 0;
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}
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static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTCTRL,
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OMAP_POWERSTATE_MASK);
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}
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static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTST,
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OMAP_POWERSTATEST_MASK);
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}
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/* Applicable only for OMAP3. Not supported on OMAP2 */
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/* Applicable only for OMAP3. Not supported on OMAP2 */
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static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
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static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
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{
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{
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@@ -356,9 +378,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
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}
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}
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struct pwrdm_ops omap3_pwrdm_operations = {
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struct pwrdm_ops omap3_pwrdm_operations = {
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.pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
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.pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
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.pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
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.pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
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.pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
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.pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
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.pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
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.pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
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.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
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.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
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.pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
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.pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
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