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drm/radeon/kms: Fix up vertical blank interrupt support.

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Fixes 3D apps timing out in the WAIT_VBLANK ioctl.

AVIVO bits compile-tested only.

Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Michel Dänzer
2009-08-13 11:10:51 +02:00
committed by Dave Airlie
parent 3f8befec95
commit 7ed220d738
9 changed files with 217 additions and 77 deletions
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54
drivers/gpu/drm/radeon/radeon_irq_kms.c
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@@ -32,60 +32,6 @@
#include "radeon.h"
#include "atom.h"
static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
{
uint32_t irqs = RREG32(RADEON_GEN_INT_STATUS);
uint32_t irq_mask = RADEON_SW_INT_TEST;
if (irqs) {
WREG32(RADEON_GEN_INT_STATUS, irqs);
}
return irqs & irq_mask;
}
int r100_irq_set(struct radeon_device *rdev)
{
uint32_t tmp = 0;
if (rdev->irq.sw_int) {
tmp |= RADEON_SW_INT_ENABLE;
}
/* Todo go through CRTC and enable vblank int or not */
WREG32(RADEON_GEN_INT_CNTL, tmp);
return 0;
}
int r100_irq_process(struct radeon_device *rdev)
{
uint32_t status;
status = r100_irq_ack(rdev);
if (!status) {
return IRQ_NONE;
}
while (status) {
/* SW interrupt */
if (status & RADEON_SW_INT_TEST) {
radeon_fence_process(rdev);
}
status = r100_irq_ack(rdev);
}
return IRQ_HANDLED;
}
int rs600_irq_set(struct radeon_device *rdev)
{
uint32_t tmp = 0;
if (rdev->irq.sw_int) {
tmp |= RADEON_SW_INT_ENABLE;
}
WREG32(RADEON_GEN_INT_CNTL, tmp);
/* Todo go through CRTC and enable vblank int or not */
WREG32(R500_DxMODE_INT_MASK, 0);
return 0;
}
irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
{
struct drm_device *dev = (struct drm_device *) arg;