iwlagn: move the disable agg logic to transport layer
Since all the check_empty logic is now in the transport layer, the upper layer doesn't need to know anything about tx queues. The disable aggregation flow was the last to know what a tx queue is, so move it too. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
committed by
John W. Linville
parent
464021ffc1
commit
7f01d567c5
@@ -408,10 +408,8 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
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int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
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int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta, u16 tid)
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struct ieee80211_sta *sta, u16 tid)
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{
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{
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int txq_id, sta_id, ssn;
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int sta_id;
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struct iwl_tid_data *tid_data;
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struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
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int write_ptr, read_ptr;
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unsigned long flags;
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sta_id = iwl_sta_id(sta);
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sta_id = iwl_sta_id(sta);
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@@ -420,61 +418,8 @@ int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
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return -ENXIO;
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return -ENXIO;
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}
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}
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spin_lock_irqsave(&priv->shrd->sta_lock, flags);
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return iwl_trans_tx_agg_disable(trans(priv), vif_priv->ctx->ctxid,
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sta_id, tid);
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tid_data = &priv->shrd->tid_data[sta_id][tid];
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ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
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txq_id = tid_data->agg.txq_id;
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switch (priv->shrd->tid_data[sta_id][tid].agg.state) {
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case IWL_EMPTYING_HW_QUEUE_ADDBA:
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/*
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* This can happen if the peer stops aggregation
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* again before we've had a chance to drain the
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* queue we selected previously, i.e. before the
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* session was really started completely.
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*/
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IWL_DEBUG_HT(priv, "AGG stop before setup done\n");
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goto turn_off;
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case IWL_AGG_ON:
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break;
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default:
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IWL_WARN(priv, "Stopping AGG while state not ON or starting\n");
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}
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write_ptr = priv->txq[txq_id].q.write_ptr;
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read_ptr = priv->txq[txq_id].q.read_ptr;
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/* The queue is not empty */
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if (write_ptr != read_ptr) {
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IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n");
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priv->shrd->tid_data[sta_id][tid].agg.state =
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IWL_EMPTYING_HW_QUEUE_DELBA;
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spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
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return 0;
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}
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IWL_DEBUG_HT(priv, "HW queue is empty\n");
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turn_off:
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priv->shrd->tid_data[sta_id][tid].agg.state = IWL_AGG_OFF;
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/* do not restore/save irqs */
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spin_unlock(&priv->shrd->sta_lock);
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spin_lock(&priv->shrd->lock);
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/*
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* the only reason this call can fail is queue number out of range,
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* which can happen if uCode is reloaded and all the station
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* information are lost. if it is outside the range, there is no need
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* to deactivate the uCode queue, just return "success" to allow
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* mac80211 to clean up it own data.
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*/
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iwl_trans_txq_agg_disable(trans(priv), txq_id);
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spin_unlock_irqrestore(&priv->shrd->lock, flags);
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ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
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return 0;
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}
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}
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static void iwlagn_non_agg_tx_status(struct iwl_priv *priv,
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static void iwlagn_non_agg_tx_status(struct iwl_priv *priv,
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@@ -189,7 +189,10 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
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void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,
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void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,
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struct iwl_tx_queue *txq,
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struct iwl_tx_queue *txq,
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u16 byte_cnt);
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u16 byte_cnt);
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int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id);
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void iwl_trans_pcie_txq_agg_disable(struct iwl_trans *trans, int txq_id);
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int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans,
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enum iwl_rxon_context_id ctx, int sta_id,
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int tid);
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void iwl_trans_set_wr_ptrs(struct iwl_trans *trans, int txq_id, u32 index);
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void iwl_trans_set_wr_ptrs(struct iwl_trans *trans, int txq_id, u32 index);
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void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
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void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
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struct iwl_tx_queue *txq,
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struct iwl_tx_queue *txq,
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@@ -560,32 +560,92 @@ int iwl_trans_pcie_tx_agg_alloc(struct iwl_trans *trans,
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return 0;
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return 0;
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}
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}
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int iwl_trans_pcie_txq_agg_disable(struct iwl_priv *priv, u16 txq_id)
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{
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struct iwl_trans *trans = trans(priv);
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if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
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(IWLAGN_FIRST_AMPDU_QUEUE +
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hw_params(priv).num_ampdu_queues <= txq_id)) {
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IWL_ERR(priv,
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"queue number out of range: %d, must be %d to %d\n",
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txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
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IWLAGN_FIRST_AMPDU_QUEUE +
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hw_params(priv).num_ampdu_queues - 1);
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return -EINVAL;
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}
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void iwl_trans_pcie_txq_agg_disable(struct iwl_trans *trans, int txq_id)
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{
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iwlagn_tx_queue_stop_scheduler(trans, txq_id);
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iwlagn_tx_queue_stop_scheduler(trans, txq_id);
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iwl_clear_bits_prph(bus(priv), SCD_AGGR_SEL, (1 << txq_id));
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iwl_clear_bits_prph(bus(trans), SCD_AGGR_SEL, (1 << txq_id));
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priv->txq[txq_id].q.read_ptr = 0;
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priv(trans)->txq[txq_id].q.read_ptr = 0;
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priv->txq[txq_id].q.write_ptr = 0;
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priv(trans)->txq[txq_id].q.write_ptr = 0;
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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/* supposes that ssn_idx is valid (!= 0xFFF) */
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iwl_trans_set_wr_ptrs(trans, txq_id, 0);
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iwl_trans_set_wr_ptrs(trans, txq_id, 0);
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iwl_clear_bits_prph(bus(priv), SCD_INTERRUPT_MASK, (1 << txq_id));
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iwl_clear_bits_prph(bus(trans), SCD_INTERRUPT_MASK, (1 << txq_id));
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iwl_txq_ctx_deactivate(priv, txq_id);
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iwl_txq_ctx_deactivate(priv(trans), txq_id);
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iwl_trans_tx_queue_set_status(priv, &priv->txq[txq_id], 0, 0);
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iwl_trans_tx_queue_set_status(priv(trans),
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&priv(trans)->txq[txq_id], 0, 0);
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}
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int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans,
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enum iwl_rxon_context_id ctx, int sta_id,
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int tid)
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{
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unsigned long flags;
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int read_ptr, write_ptr;
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struct iwl_tid_data *tid_data;
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int txq_id;
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spin_lock_irqsave(&trans->shrd->sta_lock, flags);
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tid_data = &trans->shrd->tid_data[sta_id][tid];
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txq_id = tid_data->agg.txq_id;
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if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
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(IWLAGN_FIRST_AMPDU_QUEUE +
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hw_params(trans).num_ampdu_queues <= txq_id)) {
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IWL_ERR(trans,
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"queue number out of range: %d, must be %d to %d\n",
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txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
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IWLAGN_FIRST_AMPDU_QUEUE +
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hw_params(trans).num_ampdu_queues - 1);
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spin_unlock_irqrestore(&trans->shrd->sta_lock, flags);
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return -EINVAL;
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}
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switch (trans->shrd->tid_data[sta_id][tid].agg.state) {
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case IWL_EMPTYING_HW_QUEUE_ADDBA:
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/*
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* This can happen if the peer stops aggregation
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* again before we've had a chance to drain the
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* queue we selected previously, i.e. before the
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* session was really started completely.
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*/
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IWL_DEBUG_HT(trans, "AGG stop before setup done\n");
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goto turn_off;
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case IWL_AGG_ON:
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break;
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default:
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IWL_WARN(trans, "Stopping AGG while state not ON"
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"or starting\n");
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}
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write_ptr = priv(trans)->txq[txq_id].q.write_ptr;
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read_ptr = priv(trans)->txq[txq_id].q.read_ptr;
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/* The queue is not empty */
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if (write_ptr != read_ptr) {
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IWL_DEBUG_HT(trans, "Stopping a non empty AGG HW QUEUE\n");
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trans->shrd->tid_data[sta_id][tid].agg.state =
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IWL_EMPTYING_HW_QUEUE_DELBA;
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spin_unlock_irqrestore(&trans->shrd->sta_lock, flags);
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return 0;
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}
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IWL_DEBUG_HT(trans, "HW queue is empty\n");
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turn_off:
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trans->shrd->tid_data[sta_id][tid].agg.state = IWL_AGG_OFF;
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/* do not restore/save irqs */
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spin_unlock(&trans->shrd->sta_lock);
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spin_lock(&trans->shrd->lock);
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iwl_trans_pcie_txq_agg_disable(trans, txq_id);
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spin_unlock_irqrestore(&trans->shrd->lock, flags);
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iwl_stop_tx_ba_trans_ready(priv(trans), ctx, sta_id, tid);
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return 0;
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return 0;
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}
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}
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@@ -1281,7 +1281,7 @@ static int iwlagn_txq_check_empty(struct iwl_trans *trans,
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(q->read_ptr == q->write_ptr)) {
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(q->read_ptr == q->write_ptr)) {
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IWL_DEBUG_HT(trans,
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IWL_DEBUG_HT(trans,
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"HW queue empty: continue DELBA flow\n");
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"HW queue empty: continue DELBA flow\n");
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iwl_trans_pcie_txq_agg_disable(priv(trans), txq_id);
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iwl_trans_pcie_txq_agg_disable(trans, txq_id);
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tid_data->agg.state = IWL_AGG_OFF;
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tid_data->agg.state = IWL_AGG_OFF;
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iwl_stop_tx_ba_trans_ready(priv(trans),
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iwl_stop_tx_ba_trans_ready(priv(trans),
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NUM_IWL_RXON_CTX,
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NUM_IWL_RXON_CTX,
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@@ -2015,7 +2015,7 @@ const struct iwl_trans_ops trans_ops_pcie = {
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.tx = iwl_trans_pcie_tx,
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.tx = iwl_trans_pcie_tx,
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.reclaim = iwl_trans_pcie_reclaim,
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.reclaim = iwl_trans_pcie_reclaim,
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.txq_agg_disable = iwl_trans_pcie_txq_agg_disable,
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.tx_agg_disable = iwl_trans_pcie_tx_agg_disable,
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.tx_agg_alloc = iwl_trans_pcie_tx_agg_alloc,
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.tx_agg_alloc = iwl_trans_pcie_tx_agg_alloc,
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.txq_agg_setup = iwl_trans_pcie_txq_agg_setup,
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.txq_agg_setup = iwl_trans_pcie_txq_agg_setup,
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@@ -97,7 +97,7 @@ struct iwl_device_cmd;
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* @tx_agg_alloc: allocate resources for a TX BA session
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* @tx_agg_alloc: allocate resources for a TX BA session
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* @txq_agg_setup: setup a tx queue for AMPDU - will be called once the HW is
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* @txq_agg_setup: setup a tx queue for AMPDU - will be called once the HW is
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* ready and a successful ADDBA response has been received.
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* ready and a successful ADDBA response has been received.
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* @txq_agg_disable: de-configure a Tx queue to send AMPDUs
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* @tx_agg_disable: de-configure a Tx queue to send AMPDUs
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* @kick_nic: remove the RESET from the embedded CPU and let it run
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* @kick_nic: remove the RESET from the embedded CPU and let it run
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* @free: release all the ressource for the transport layer itself such as
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* @free: release all the ressource for the transport layer itself such as
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* irq, tasklet etc...
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* irq, tasklet etc...
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@@ -127,7 +127,9 @@ struct iwl_trans_ops {
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int txq_id, int ssn, u32 status,
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int txq_id, int ssn, u32 status,
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struct sk_buff_head *skbs);
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struct sk_buff_head *skbs);
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int (*txq_agg_disable)(struct iwl_priv *priv, u16 txq_id);
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int (*tx_agg_disable)(struct iwl_trans *trans,
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enum iwl_rxon_context_id ctx, int sta_id,
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int tid);
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int (*tx_agg_alloc)(struct iwl_trans *trans,
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int (*tx_agg_alloc)(struct iwl_trans *trans,
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enum iwl_rxon_context_id ctx, int sta_id, int tid,
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enum iwl_rxon_context_id ctx, int sta_id, int tid,
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u16 *ssn);
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u16 *ssn);
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@@ -216,9 +218,11 @@ static inline void iwl_trans_reclaim(struct iwl_trans *trans, int sta_id,
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trans->ops->reclaim(trans, sta_id, tid, txq_id, ssn, status, skbs);
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trans->ops->reclaim(trans, sta_id, tid, txq_id, ssn, status, skbs);
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}
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}
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static inline int iwl_trans_txq_agg_disable(struct iwl_trans *trans, u16 txq_id)
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static inline int iwl_trans_tx_agg_disable(struct iwl_trans *trans,
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enum iwl_rxon_context_id ctx,
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int sta_id, int tid)
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{
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{
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return trans->ops->txq_agg_disable(priv(trans), txq_id);
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return trans->ops->tx_agg_disable(trans, ctx, sta_id, tid);
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}
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}
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static inline int iwl_trans_tx_agg_alloc(struct iwl_trans *trans,
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static inline int iwl_trans_tx_agg_alloc(struct iwl_trans *trans,
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