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SM501: Clock updates and checks

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Ensure that the M1XCLK and MCLK are sourced from the same PLL (and refuse to
bind the driver if they are not).

Update the PCI to safe initialisation values, as 72MHz is the maximum clock
for 33MHz PCI bus mastering.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Ben Dooks
2007-06-23 17:16:30 -07:00
committed by Linus Torvalds
parent 5136237bc3
commit 819062219a
2 changed files with 36 additions and 2 deletions
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5
include/linux/sm501-regs.h
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@@ -64,6 +64,11 @@
#define SM501_DEBUG_CONTROL (0x000034)
/* power management */
#define SM501_POWERMODE_P2X_SRC (1<<29)
#define SM501_POWERMODE_V2X_SRC (1<<20)
#define SM501_POWERMODE_M_SRC (1<<12)
#define SM501_POWERMODE_M1_SRC (1<<4)
#define SM501_CURRENT_GATE (0x000038)
#define SM501_CURRENT_CLOCK (0x00003C)
#define SM501_POWER_MODE_0_GATE (0x000040)