Merge branch 'next/cleanup2' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup2' of git://git.linaro.org/people/arnd/arm-soc: (31 commits) ARM: OMAP: Warn if omap_ioremap is called before SoC detection ARM: OMAP: Move set_globals initialization to happen in init_early ARM: OMAP: Map SRAM later on with ioremap_exec() ARM: OMAP: Remove calls to SRAM allocations for framebuffer ARM: OMAP: Avoid cpu_is_omapxxxx usage until map_io is done ARM: OMAP1: Use generic map_io, init_early and init_irq arm/dts: OMAP3+: Add mpu, dsp and iva nodes arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver ARM: OMAP2+: l3-noc: Add support for device-tree ARM: OMAP2+: board-generic: Add i2c static init ARM: OMAP2+: board-generic: Add DT support to generic board arm/dts: Add support for OMAP3 Beagle board arm/dts: Add initial device tree support for OMAP3 SoC arm/dts: Add support for OMAP4 SDP board arm/dts: Add support for OMAP4 PandaBoard arm/dts: Add initial device tree support for OMAP4 SoC ARM: OMAP: omap_device: Add a method to build an omap_device from a DT node ARM: OMAP: omap_device: Add omap_device_[alloc|delete] for DT integration of: Add helpers to get one string in multiple strings property ARM: OMAP2+: devices: Remove all omap_device_pm_latency structures ... Fix up trivial header file conflicts in arch/arm/mach-omap2/board-generic.c
This commit is contained in:
Linus Torvalds
29
arch/arm/boot/dts/omap3-beagle.dts
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29
arch/arm/boot/dts/omap3-beagle.dts
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@@ -0,0 +1,29 @@
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "omap3.dtsi"
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/ {
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model = "TI OMAP3 BeagleBoard";
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compatible = "ti,omap3-beagle", "ti,omap3";
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/*
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* Since the initial device tree board file does not create any
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* devices (MMC, network...), the only way to boot is to provide a
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* ramdisk.
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*/
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chosen {
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bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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};
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63
arch/arm/boot/dts/omap3.dtsi
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63
arch/arm/boot/dts/omap3.dtsi
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/*
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* Device Tree Source for OMAP3 SoC
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "ti,omap3430", "ti,omap3";
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a8";
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};
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};
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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iva {
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compatible = "ti,iva2.2";
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ti,hwmods = "iva";
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dsp {
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compatible = "ti,omap3-c64";
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};
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};
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};
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/*
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* XXX: Use a flat representation of the OMAP3 interconnect.
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* The real OMAP interconnect network is quite complex.
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* Since that will not bring real advantage to represent that in DT for
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* the moment, just use a fake OCP bus entry to represent the whole bus
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* hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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intc: interrupt-controller@1 {
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compatible = "ti,omap3-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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};
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};
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29
arch/arm/boot/dts/omap4-panda.dts
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29
arch/arm/boot/dts/omap4-panda.dts
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "omap4.dtsi"
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/ {
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model = "TI OMAP4 PandaBoard";
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compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
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/*
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* Since the initial device tree board file does not create any
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* devices (MMC, network...), the only way to boot is to provide a
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* ramdisk.
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*/
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chosen {
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bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug";
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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};
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29
arch/arm/boot/dts/omap4-sdp.dts
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29
arch/arm/boot/dts/omap4-sdp.dts
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "omap4.dtsi"
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/ {
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model = "TI OMAP4 SDP board";
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compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
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/*
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* Since the initial device tree board file does not create any
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* devices (MMC, network...), the only way to boot is to provide a
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* ramdisk.
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*/
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chosen {
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bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug";
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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};
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103
arch/arm/boot/dts/omap4.dtsi
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103
arch/arm/boot/dts/omap4.dtsi
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@@ -0,0 +1,103 @@
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Carveout for multimedia usecases
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* It should be the last 48MB of the first 512MB memory part
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* In theory, it should not even exist. That zone should be reserved
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* dynamically during the .reserve callback.
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*/
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/memreserve/ 0x9d000000 0x03000000;
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/include/ "skeleton.dtsi"
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/ {
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compatible = "ti,omap4430", "ti,omap4";
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interrupt-parent = <&gic>;
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aliases {
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};
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a9";
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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};
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};
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap4-mpu";
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ti,hwmods = "mpu";
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};
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dsp {
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compatible = "ti,omap3-c64";
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ti,hwmods = "dsp";
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};
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iva {
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compatible = "ti,ivahd";
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ti,hwmods = "iva";
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};
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};
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/*
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* XXX: Use a flat representation of the OMAP4 interconnect.
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* The real OMAP interconnect network is quite complex.
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*
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* MPU -+-- MPU_PRIVATE - GIC, L2
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* |
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* +----------------+----------+
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* | | |
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* + +- EMIF - DDR |
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* | | |
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* | + +--------+
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* | | |
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* | +- L4_ABE - AESS, MCBSP, TIMERs...
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* | |
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* +- L3_MAIN --+- L4_CORE - IPs...
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* |
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* +- L4_PER - IPs...
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* |
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* +- L4_CFG -+- L4_WKUP - IPs...
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* | |
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* | +- IPs...
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* +- IPU ----+
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* | |
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* +- DSP ----+
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* | |
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* +- DSS ----+
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*
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* Since that will not bring real advantage to represent that in DT for
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* the moment, just use a fake OCP bus entry to represent the whole bus
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* hierarchy.
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*/
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ocp {
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compatible = "ti,omap4-l3-noc", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
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gic: interrupt-controller@48241000 {
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x48241000 0x1000>,
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<0x48240100 0x0100>;
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};
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};
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};
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