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hwrng: via_rng - Support VIA Nano hardware RNG

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The VIA Nano CPU supports the same XSTORE instruction based RNG,
but it lacks the MSR present in earlier CPUs.

Signed-off-by: Harald Welte <HaraldWelte@viatech.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Harald Welte
2009-05-15 16:00:32 +10:00
committed by Herbert Xu
parent 608d1cd5d3
commit 858576bdc5
1 changed files with 13 additions and 0 deletions
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13
drivers/char/hw_random/via-rng.c
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@@ -132,6 +132,19 @@ static int via_rng_init(struct hwrng *rng)
struct cpuinfo_x86 *c = &cpu_data(0); struct cpuinfo_x86 *c = &cpu_data(0);
u32 lo, hi, old_lo; u32 lo, hi, old_lo;
/* VIA Nano CPUs don't have the MSR_VIA_RNG anymore. The RNG
* is always enabled if CPUID rng_en is set. There is no
* RNG configuration like it used to be the case in this
* register */
if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
if (!cpu_has_xstore_enabled) {
printk(KERN_ERR PFX "can't enable hardware RNG "
"if XSTORE is not enabled\n");
return -ENODEV;
}
return 0;
}
/* Control the RNG via MSR. Tread lightly and pay very close /* Control the RNG via MSR. Tread lightly and pay very close
* close attention to values written, as the reserved fields * close attention to values written, as the reserved fields
* are documented to be "undefined and unpredictable"; but it * are documented to be "undefined and unpredictable"; but it