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x86, cpu: Fix detection of Celeron Covington stepping A1 and B0

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Steppings A1 and B0 of Celeron Covington are currently misdetected as
Pentium II (Dixon). Fix it by removing the stepping check.

[ hpa: this fixes this specific bug... the CPUID documentation
  specifies that the L2 cache size can disambiguate additional CPUs;
  this patch does not fix that. ]

Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Link: http://lkml.kernel.org/r/201105162138.15416.linux@rainbow-software.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
Ondrej Zary 2011-05-16 21:38:08 +02:00 committed by H. Peter Anvin
parent eecaaba5b2
commit 865be7a810
1 changed files with 4 additions and 6 deletions
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10
arch/x86/kernel/cpu/intel.c
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@ -400,12 +400,10 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
switch (c->x86_model) { switch (c->x86_model) {
case 5: case 5:
if (c->x86_mask == 0) { if (l2 == 0)
if (l2 == 0) p = "Celeron (Covington)";
p = "Celeron (Covington)"; else if (l2 == 256)
else if (l2 == 256) p = "Mobile Pentium II (Dixon)";
p = "Mobile Pentium II (Dixon)";
}
break; break;
case 6: case 6: