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[SPARC64]: Fix race in LOAD_PER_CPU_BASE()

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Since we use %g5 itself as a temporary, it can get clobbered
if we take an interrupt mid-stream and thus cause end up with
the final %g5 value too early as a result of rtrap processing.

Set %g5 at the very end, atomically, to avoid this problem.

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
2006-01-31 18:34:51 -08:00
committed by David S. Miller
parent 9954863975
commit 86b818687d
4 changed files with 18 additions and 13 deletions
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2
arch/sparc64/kernel/rtrap.S
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@@ -226,7 +226,7 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
brz,pt %l3, 1f
nop
/* Must do this before thread reg is clobbered below. */
LOAD_PER_CPU_BASE(%g6, %g7)
LOAD_PER_CPU_BASE(%i0, %i1, %i2)
1:
ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7