x86, microcode: Correct microcode revision format
506ed6b53e
("x86, intel: Output microcode revision in /proc/cpuinfo")
added microcode revision format to /proc/cpuinfo and the MCE handler in
decimal format but both AMD and Intel patch levels are handled as hex
numbers. Fix it.
Acked-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
This commit is contained in:
@@ -221,7 +221,7 @@ static void print_mce(struct mce *m)
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* Note this output is parsed by external tools and old fields
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* Note this output is parsed by external tools and old fields
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* should not be changed.
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* should not be changed.
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*/
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*/
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pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %u\n",
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pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n",
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m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
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m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
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cpu_data(m->extcpu).microcode);
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cpu_data(m->extcpu).microcode);
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@@ -86,7 +86,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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else
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else
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seq_printf(m, "stepping\t: unknown\n");
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seq_printf(m, "stepping\t: unknown\n");
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if (c->microcode)
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if (c->microcode)
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seq_printf(m, "microcode\t: %u\n", c->microcode);
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seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
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if (cpu_has(c, X86_FEATURE_TSC)) {
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if (cpu_has(c, X86_FEATURE_TSC)) {
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unsigned int freq = cpufreq_quick_get(cpu);
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unsigned int freq = cpufreq_quick_get(cpu);
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