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ARM: OMAP: mcbsp: Make tranceiver configuration control register access generic

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McBSP transmit and receive configuration control registers must be set up
for OMAP2430 and later. Replace is_omap tests in generic code with a new
feature flag has_ccr in platform data so that there is no need to change
code for any upcoming OMAP version.

Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Jarkko Nikula
2011-09-26 10:45:41 +03:00
committed by Tony Lindgren
parent 1a6458847d
commit 88408230d2
3 changed files with 9 additions and 6 deletions
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6
arch/arm/mach-omap2/mcbsp.c
View File

@@ -127,10 +127,12 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
} }
pdata->reg_step = 4; pdata->reg_step = 4;
if (oh->class->rev < MCBSP_CONFIG_TYPE2) if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
pdata->reg_size = 2; pdata->reg_size = 2;
else } else {
pdata->reg_size = 4; pdata->reg_size = 4;
pdata->has_ccr = true;
}
if (oh->class->rev == MCBSP_CONFIG_TYPE3) { if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2) if (id == 2)

1
arch/arm/plat-omap/include/plat/mcbsp.h
View File

@@ -320,6 +320,7 @@ struct omap_mcbsp_platform_data {
/* McBSP platform and instance specific features */ /* McBSP platform and instance specific features */
bool has_wakeup; /* Wakeup capability */ bool has_wakeup; /* Wakeup capability */
bool has_ccr; /* Transceiver has configuration control registers */
}; };
struct omap_mcbsp_st_data { struct omap_mcbsp_st_data {

8
arch/arm/plat-omap/mcbsp.c
View File

@@ -184,7 +184,7 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
MCBSP_WRITE(mcbsp, MCR2, config->mcr2); MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
MCBSP_WRITE(mcbsp, MCR1, config->mcr1); MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
MCBSP_WRITE(mcbsp, PCR0, config->pcr0); MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { if (mcbsp->pdata->has_ccr) {
MCBSP_WRITE(mcbsp, XCCR, config->xccr); MCBSP_WRITE(mcbsp, XCCR, config->xccr);
MCBSP_WRITE(mcbsp, RCCR, config->rccr); MCBSP_WRITE(mcbsp, RCCR, config->rccr);
} }
@@ -848,7 +848,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7)); MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
} }
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { if (mcbsp->pdata->has_ccr) {
/* Release the transmitter and receiver */ /* Release the transmitter and receiver */
w = MCBSP_READ_CACHE(mcbsp, XCCR); w = MCBSP_READ_CACHE(mcbsp, XCCR);
w &= ~(tx ? XDISABLE : 0); w &= ~(tx ? XDISABLE : 0);
@@ -878,7 +878,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset transmitter */ /* Reset transmitter */
tx &= 1; tx &= 1;
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { if (mcbsp->pdata->has_ccr) {
w = MCBSP_READ_CACHE(mcbsp, XCCR); w = MCBSP_READ_CACHE(mcbsp, XCCR);
w |= (tx ? XDISABLE : 0); w |= (tx ? XDISABLE : 0);
MCBSP_WRITE(mcbsp, XCCR, w); MCBSP_WRITE(mcbsp, XCCR, w);
@@ -888,7 +888,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset receiver */ /* Reset receiver */
rx &= 1; rx &= 1;
if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { if (mcbsp->pdata->has_ccr) {
w = MCBSP_READ_CACHE(mcbsp, RCCR); w = MCBSP_READ_CACHE(mcbsp, RCCR);
w |= (rx ? RDISABLE : 0); w |= (rx ? RDISABLE : 0);
MCBSP_WRITE(mcbsp, RCCR, w); MCBSP_WRITE(mcbsp, RCCR, w);