scsi/NCR5380: adopt NCR5380_dprint() and NCR5380_dprint_phase()
All NCR5380 drivers already include the NCR5380.h header. Better to adopt those macros rather than have three variations on them. Moreover, the macros in NCR5380.h are preferable anyway: the atari_NCR5380 and sun3_NCR5380 versions are inflexible. For example, they can't accomodate NCR5380_dprint(NDEBUG_MAIN | NDEBUG_QUEUES, ...) Replace the NCR_PRINT* macros from atari_NCR5380.h and sun3_NCR5380.h with the equivalent macros from NCR5380.h. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Acked-by: Sam Creasey <sammy@sammy.net> Acked-by: Michael Schmitz <schmitz@debian.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
This commit is contained in:
committed by
Christoph Hellwig
parent
52a6a1cbd9
commit
8ad3a59314
@@ -739,8 +739,8 @@ static void NCR5380_print_status(struct Scsi_Host *instance)
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Scsi_Cmnd *ptr;
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Scsi_Cmnd *ptr;
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unsigned long flags;
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unsigned long flags;
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NCR_PRINT(NDEBUG_ANY);
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NCR5380_dprint(NDEBUG_ANY, instance);
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NCR_PRINT_PHASE(NDEBUG_ANY);
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NCR5380_dprint_phase(NDEBUG_ANY, instance);
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hostdata = (struct NCR5380_hostdata *)instance->hostdata;
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hostdata = (struct NCR5380_hostdata *)instance->hostdata;
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@@ -1268,7 +1268,7 @@ static irqreturn_t NCR5380_intr(int irq, void *dev_id)
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INT_PRINTK("scsi%d: BASR=%02x\n", HOSTNO, basr);
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INT_PRINTK("scsi%d: BASR=%02x\n", HOSTNO, basr);
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/* dispatch to appropriate routine if found and done=0 */
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/* dispatch to appropriate routine if found and done=0 */
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if (basr & BASR_IRQ) {
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if (basr & BASR_IRQ) {
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NCR_PRINT(NDEBUG_INTR);
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NCR5380_dprint(NDEBUG_INTR, instance);
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if ((NCR5380_read(STATUS_REG) & (SR_SEL|SR_IO)) == (SR_SEL|SR_IO)) {
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if ((NCR5380_read(STATUS_REG) & (SR_SEL|SR_IO)) == (SR_SEL|SR_IO)) {
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done = 0;
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done = 0;
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ENABLE_IRQ();
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ENABLE_IRQ();
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@@ -1396,7 +1396,7 @@ static int NCR5380_select(struct Scsi_Host *instance, Scsi_Cmnd *cmd, int tag)
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unsigned long flags;
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unsigned long flags;
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hostdata->restart_select = 0;
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hostdata->restart_select = 0;
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NCR_PRINT(NDEBUG_ARBITRATION);
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NCR5380_dprint(NDEBUG_ARBITRATION, instance);
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ARB_PRINTK("scsi%d: starting arbitration, id = %d\n", HOSTNO,
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ARB_PRINTK("scsi%d: starting arbitration, id = %d\n", HOSTNO,
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instance->this_id);
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instance->this_id);
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@@ -1617,7 +1617,7 @@ static int NCR5380_select(struct Scsi_Host *instance, Scsi_Cmnd *cmd, int tag)
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printk(KERN_ERR "scsi%d: weirdness\n", HOSTNO);
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printk(KERN_ERR "scsi%d: weirdness\n", HOSTNO);
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if (hostdata->restart_select)
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if (hostdata->restart_select)
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printk(KERN_NOTICE "\trestart select\n");
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printk(KERN_NOTICE "\trestart select\n");
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NCR_PRINT(NDEBUG_ANY);
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NCR5380_dprint(NDEBUG_ANY, instance);
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NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
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NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
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return -1;
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return -1;
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}
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}
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@@ -1742,7 +1742,7 @@ static int NCR5380_transfer_pio(struct Scsi_Host *instance,
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/* Check for phase mismatch */
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/* Check for phase mismatch */
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if ((tmp & PHASE_MASK) != p) {
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if ((tmp & PHASE_MASK) != p) {
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PIO_PRINTK("scsi%d: phase mismatch\n", HOSTNO);
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PIO_PRINTK("scsi%d: phase mismatch\n", HOSTNO);
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NCR_PRINT_PHASE(NDEBUG_PIO);
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NCR5380_dprint_phase(NDEBUG_PIO, instance);
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break;
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break;
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}
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}
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@@ -1764,18 +1764,18 @@ static int NCR5380_transfer_pio(struct Scsi_Host *instance,
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if (!(p & SR_IO)) {
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if (!(p & SR_IO)) {
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if (!((p & SR_MSG) && c > 1)) {
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if (!((p & SR_MSG) && c > 1)) {
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
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NCR_PRINT(NDEBUG_PIO);
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NCR5380_dprint(NDEBUG_PIO, instance);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA | ICR_ASSERT_ACK);
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ICR_ASSERT_DATA | ICR_ASSERT_ACK);
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} else {
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} else {
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA | ICR_ASSERT_ATN);
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ICR_ASSERT_DATA | ICR_ASSERT_ATN);
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NCR_PRINT(NDEBUG_PIO);
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NCR5380_dprint(NDEBUG_PIO, instance);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
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ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
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}
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}
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} else {
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} else {
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NCR_PRINT(NDEBUG_PIO);
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NCR5380_dprint(NDEBUG_PIO, instance);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
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}
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}
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@@ -1997,7 +1997,7 @@ static void NCR5380_information_transfer(struct Scsi_Host *instance)
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phase = (tmp & PHASE_MASK);
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phase = (tmp & PHASE_MASK);
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if (phase != old_phase) {
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if (phase != old_phase) {
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old_phase = phase;
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old_phase = phase;
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NCR_PRINT_PHASE(NDEBUG_INFORMATION);
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NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
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}
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}
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if (sink && (phase != PHASE_MSGOUT)) {
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if (sink && (phase != PHASE_MSGOUT)) {
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@@ -2451,7 +2451,7 @@ static void NCR5380_information_transfer(struct Scsi_Host *instance)
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break;
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break;
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default:
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default:
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printk("scsi%d: unknown phase\n", HOSTNO);
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printk("scsi%d: unknown phase\n", HOSTNO);
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NCR_PRINT(NDEBUG_ANY);
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NCR5380_dprint(NDEBUG_ANY, instance);
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} /* switch(phase) */
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} /* switch(phase) */
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} /* if (tmp * SR_REQ) */
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} /* if (tmp * SR_REQ) */
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} /* while (1) */
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} /* while (1) */
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@@ -681,8 +681,8 @@ static void NCR5380_print_status(struct Scsi_Host *instance)
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Scsi_Cmnd *ptr;
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Scsi_Cmnd *ptr;
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unsigned long flags;
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unsigned long flags;
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NCR_PRINT(NDEBUG_ANY);
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NCR5380_dprint(NDEBUG_ANY, instance);
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NCR_PRINT_PHASE(NDEBUG_ANY);
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NCR5380_dprint_phase(NDEBUG_ANY, instance);
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hostdata = (struct NCR5380_hostdata *)instance->hostdata;
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hostdata = (struct NCR5380_hostdata *)instance->hostdata;
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@@ -1196,7 +1196,7 @@ static irqreturn_t NCR5380_intr (int irq, void *dev_id)
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INT_PRINTK("scsi%d: BASR=%02x\n", HOSTNO, basr);
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INT_PRINTK("scsi%d: BASR=%02x\n", HOSTNO, basr);
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/* dispatch to appropriate routine if found and done=0 */
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/* dispatch to appropriate routine if found and done=0 */
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if (basr & BASR_IRQ) {
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if (basr & BASR_IRQ) {
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NCR_PRINT(NDEBUG_INTR);
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NCR5380_dprint(NDEBUG_INTR, instance);
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if ((NCR5380_read(STATUS_REG) & (SR_SEL|SR_IO)) == (SR_SEL|SR_IO)) {
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if ((NCR5380_read(STATUS_REG) & (SR_SEL|SR_IO)) == (SR_SEL|SR_IO)) {
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done = 0;
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done = 0;
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// ENABLE_IRQ();
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// ENABLE_IRQ();
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@@ -1338,7 +1338,7 @@ static int NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd,
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unsigned long flags;
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unsigned long flags;
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hostdata->restart_select = 0;
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hostdata->restart_select = 0;
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NCR_PRINT(NDEBUG_ARBITRATION);
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NCR5380_dprint(NDEBUG_ARBITRATION, instance);
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ARB_PRINTK("scsi%d: starting arbitration, id = %d\n", HOSTNO,
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ARB_PRINTK("scsi%d: starting arbitration, id = %d\n", HOSTNO,
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instance->this_id);
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instance->this_id);
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@@ -1559,7 +1559,7 @@ static int NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd,
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printk(KERN_ERR "scsi%d: weirdness\n", HOSTNO);
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printk(KERN_ERR "scsi%d: weirdness\n", HOSTNO);
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if (hostdata->restart_select)
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if (hostdata->restart_select)
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printk(KERN_NOTICE "\trestart select\n");
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printk(KERN_NOTICE "\trestart select\n");
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NCR_PRINT(NDEBUG_ANY);
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NCR5380_dprint(NDEBUG_ANY, instance);
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NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
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NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
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return -1;
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return -1;
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}
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}
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@@ -1685,7 +1685,7 @@ static int NCR5380_transfer_pio( struct Scsi_Host *instance,
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/* Check for phase mismatch */
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/* Check for phase mismatch */
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if ((tmp & PHASE_MASK) != p) {
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if ((tmp & PHASE_MASK) != p) {
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PIO_PRINTK("scsi%d: phase mismatch\n", HOSTNO);
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PIO_PRINTK("scsi%d: phase mismatch\n", HOSTNO);
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NCR_PRINT_PHASE(NDEBUG_PIO);
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NCR5380_dprint_phase(NDEBUG_PIO, instance);
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break;
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break;
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}
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}
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@@ -1708,18 +1708,18 @@ static int NCR5380_transfer_pio( struct Scsi_Host *instance,
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if (!((p & SR_MSG) && c > 1)) {
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if (!((p & SR_MSG) && c > 1)) {
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA);
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ICR_ASSERT_DATA);
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NCR_PRINT(NDEBUG_PIO);
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NCR5380_dprint(NDEBUG_PIO, instance);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA | ICR_ASSERT_ACK);
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ICR_ASSERT_DATA | ICR_ASSERT_ACK);
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} else {
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} else {
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA | ICR_ASSERT_ATN);
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ICR_ASSERT_DATA | ICR_ASSERT_ATN);
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NCR_PRINT(NDEBUG_PIO);
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NCR5380_dprint(NDEBUG_PIO, instance);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
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ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
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ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
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}
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}
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} else {
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} else {
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NCR_PRINT(NDEBUG_PIO);
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NCR5380_dprint(NDEBUG_PIO, instance);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
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NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
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}
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}
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@@ -1931,7 +1931,7 @@ static void NCR5380_information_transfer (struct Scsi_Host *instance)
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phase = (tmp & PHASE_MASK);
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phase = (tmp & PHASE_MASK);
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if (phase != old_phase) {
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if (phase != old_phase) {
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old_phase = phase;
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old_phase = phase;
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NCR_PRINT_PHASE(NDEBUG_INFORMATION);
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NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
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}
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}
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if(phase == PHASE_CMDOUT) {
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if(phase == PHASE_CMDOUT) {
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@@ -2416,7 +2416,7 @@ static void NCR5380_information_transfer (struct Scsi_Host *instance)
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break;
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break;
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default:
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default:
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printk("scsi%d: unknown phase\n", HOSTNO);
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printk("scsi%d: unknown phase\n", HOSTNO);
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NCR_PRINT(NDEBUG_ANY);
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NCR5380_dprint(NDEBUG_ANY, instance);
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} /* switch(phase) */
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} /* switch(phase) */
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} /* if (tmp * SR_REQ) */
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} /* if (tmp * SR_REQ) */
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} /* while (1) */
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} /* while (1) */
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