[SPARC64]: More TLB/TSB handling fixes.
The SUN4V convention with non-shared TSBs is that the context bit of the TAG is clear. So we have to choose an "invalid" bit and initialize new TSBs appropriately. Otherwise a zero TAG looks "valid". Make sure, for the window fixup cases, that we use the right global registers and that we don't potentially trample on the live global registers in etrap/rtrap handling (%g2 and %g6) and that we put the missing virtual address properly in %g5. Signed-off-by: David S. Miller <davem@davemloft.net>
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@@ -52,8 +52,10 @@ kvmap_itlb_vmalloc_addr:
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/* Load and check PTE. */
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ldxa [%g5] ASI_PHYS_USE_EC, %g5
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mov 1, %g7
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sllx %g7, TSB_TAG_INVALID_BIT, %g7
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brgez,a,pn %g5, kvmap_itlb_longpath
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KTSB_STORE(%g1, %g0)
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KTSB_STORE(%g1, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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@@ -146,8 +148,10 @@ kvmap_dtlb_vmalloc_addr:
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/* Load and check PTE. */
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ldxa [%g5] ASI_PHYS_USE_EC, %g5
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mov 1, %g7
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sllx %g7, TSB_TAG_INVALID_BIT, %g7
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brgez,a,pn %g5, kvmap_dtlb_longpath
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KTSB_STORE(%g1, %g0)
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KTSB_STORE(%g1, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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@@ -215,8 +219,8 @@ kvmap_dtlb_longpath:
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wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
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.section .sun4v_2insn_patch, "ax"
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.word 661b
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nop
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nop
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SET_GL(1)
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ldxa [%g0] ASI_SCRATCHPAD, %g5
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.previous
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rdpr %tl, %g3
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@@ -226,7 +230,7 @@ kvmap_dtlb_longpath:
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ldxa [%g4] ASI_DMMU, %g5
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.section .sun4v_2insn_patch, "ax"
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.word 661b
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mov %g4, %g5
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ldx [%g5 + HV_FAULT_D_ADDR_OFFSET], %g5
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nop
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.previous
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