[SPARC64]: More sensible udelay implementation.
Take a page from the powerpc folks and just calculate the delay factor directly. Since frequency scaling chips use a system-tick register, the value is going to be the same system-wide. Signed-off-by: David S. Miller <davem@davemloft.net>
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@@ -442,7 +442,6 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
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"D$ parity tl1\t: %u\n"
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"I$ parity tl1\t: %u\n"
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#ifndef CONFIG_SMP
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"Cpu0Bogo\t: %lu.%02lu\n"
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"Cpu0ClkTck\t: %016lx\n"
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#endif
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,
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@@ -457,8 +456,6 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
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dcache_parity_tl1_occurred,
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icache_parity_tl1_occurred
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#ifndef CONFIG_SMP
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, cpu_data(0).udelay_val/(500000/HZ),
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(cpu_data(0).udelay_val/(5000/HZ)) % 100,
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cpu_data(0).clock_tick
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#endif
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);
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