[SPARC64]: More sensible udelay implementation.
Take a page from the powerpc folks and just calculate the delay factor directly. Since frequency scaling chips use a system-tick register, the value is going to be the same system-wide. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -849,9 +849,6 @@ static unsigned long sparc64_init_timers(void)
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{
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struct device_node *dp;
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unsigned long clock;
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#ifdef CONFIG_SMP
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extern void smp_tick_init(void);
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#endif
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dp = of_find_node_by_path("/");
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if (tlb_type == spitfire) {
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@ -874,10 +871,6 @@ static unsigned long sparc64_init_timers(void)
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clock = of_getintprop_default(dp, "stick-frequency", 0);
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}
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#ifdef CONFIG_SMP
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smp_tick_init();
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#endif
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return clock;
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}
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@ -1038,10 +1031,31 @@ static void __init setup_clockevent_multiplier(unsigned long hz)
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sparc64_clockevent.mult = mult;
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}
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static unsigned long tb_ticks_per_usec __read_mostly;
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void __delay(unsigned long loops)
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{
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unsigned long bclock, now;
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bclock = tick_ops->get_tick();
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do {
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now = tick_ops->get_tick();
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} while ((now-bclock) < loops);
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}
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EXPORT_SYMBOL(__delay);
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void udelay(unsigned long usecs)
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{
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__delay(tb_ticks_per_usec * usecs);
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}
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EXPORT_SYMBOL(udelay);
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void __init time_init(void)
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{
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unsigned long clock = sparc64_init_timers();
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tb_ticks_per_usec = clock / USEC_PER_SEC;
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timer_ticks_per_nsec_quotient =
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clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
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