x86: merge dma_supported
The code for both arches are very similar, so this patch merge them. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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committed by
Ingo Molnar
parent
bca5c09663
commit
8e0c379718
@@ -14,6 +14,8 @@ EXPORT_SYMBOL(forbid_dac);
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const struct dma_mapping_ops *dma_ops;
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EXPORT_SYMBOL(dma_ops);
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int iommu_sac_force __read_mostly = 0;
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#ifdef CONFIG_IOMMU_DEBUG
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int panic_on_overflow __read_mostly = 1;
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int force_iommu __read_mostly = 1;
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@@ -103,6 +105,48 @@ void __init pci_iommu_alloc(void)
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}
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#endif
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int dma_supported(struct device *dev, u64 mask)
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{
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#ifdef CONFIG_PCI
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if (mask > 0xffffffff && forbid_dac > 0) {
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printk(KERN_INFO "PCI: Disallowing DAC for device %s\n",
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dev->bus_id);
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return 0;
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}
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#endif
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if (dma_ops->dma_supported)
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return dma_ops->dma_supported(dev, mask);
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/* Copied from i386. Doesn't make much sense, because it will
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only work for pci_alloc_coherent.
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The caller just has to use GFP_DMA in this case. */
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if (mask < DMA_24BIT_MASK)
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return 0;
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/* Tell the device to use SAC when IOMMU force is on. This
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allows the driver to use cheaper accesses in some cases.
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Problem with this is that if we overflow the IOMMU area and
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return DAC as fallback address the device may not handle it
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correctly.
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As a special case some controllers have a 39bit address
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mode that is as efficient as 32bit (aic79xx). Don't force
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SAC for these. Assume all masks <= 40 bits are of this
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type. Normally this doesn't make any difference, but gives
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more gentle handling of IOMMU overflow. */
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if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
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printk(KERN_INFO "%s: Force SAC with mask %Lx\n",
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dev->bus_id, mask);
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return 0;
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}
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return 1;
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}
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EXPORT_SYMBOL(dma_supported);
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static int __init pci_iommu_init(void)
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{
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#ifdef CONFIG_CALGARY_IOMMU
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