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Detect the MIPS R2 vectored interrupt, external interrupt controller

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options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2005-07-14 07:34:18 +00:00
parent 699dbc90e8
commit 8f40611d2b
5 changed files with 105 additions and 48 deletions
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24
include/asm-mips/cpu-features.h
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@@ -109,6 +109,14 @@
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif
#ifdef CONFIG_MIPS_MT
#ifndef cpu_has_mipsmt
# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
#endif
#else
# define cpu_has_mipsmt 0
#endif
#ifdef CONFIG_32BIT
# ifndef cpu_has_nofpuex
# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
@@ -145,6 +153,22 @@
# endif
#endif
#ifdef CONFIG_CPU_MIPSR2
# if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT)
# else
# define cpu_has_vint 0
# endif
# if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
# else
# define cpu_has_veic 0
# endif
#else
# define cpu_has_vint 0
# define cpu_has_veic 0
#endif
#ifndef cpu_has_subset_pcaches
#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
#endif