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ath9k: Cleanup ineffective return values

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This patch makes the return type of some of the functions
void as those functions always return true

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Vasanthakumar Thiagarajan
2009-05-08 17:54:51 -07:00
committed by John W. Linville
parent 19eddca676
commit 8fbff4b838
6 changed files with 36 additions and 85 deletions
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51
drivers/net/wireless/ath/ath9k/eeprom.c
View File

@@ -694,7 +694,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah,
#undef TMP_VAL_VPD_TABLE #undef TMP_VAL_VPD_TABLE
} }
static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
int16_t *pTxPowerIndexOffset) int16_t *pTxPowerIndexOffset)
{ {
@@ -805,11 +805,9 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
} }
*pTxPowerIndexOffset = 0; *pTxPowerIndexOffset = 0;
return true;
} }
static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah, static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
int16_t *ratesArray, int16_t *ratesArray,
u16 cfgCtl, u16 cfgCtl,
@@ -1041,10 +1039,9 @@ static bool ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0];
ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0];
} }
return true;
} }
static int ath9k_hw_4k_set_txpower(struct ath_hw *ah, static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
u16 cfgCtl, u16 cfgCtl,
u8 twiceAntennaReduction, u8 twiceAntennaReduction,
@@ -1065,22 +1062,13 @@ static int ath9k_hw_4k_set_txpower(struct ath_hw *ah,
ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
} }
if (!ath9k_hw_set_4k_power_per_rate_table(ah, chan, ath9k_hw_set_4k_power_per_rate_table(ah, chan,
&ratesArray[0], cfgCtl, &ratesArray[0], cfgCtl,
twiceAntennaReduction, twiceAntennaReduction,
twiceMaxRegulatoryPower, twiceMaxRegulatoryPower,
powerLimit)) { powerLimit);
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
"ath9k_hw_set_txpower: unable to set "
"tx power per rate table\n");
return -EIO;
}
if (!ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset)) { ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset);
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
"ath9k_hw_set_txpower: unable to set power table\n");
return -EIO;
}
for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
@@ -1168,7 +1156,6 @@ static int ath9k_hw_4k_set_txpower(struct ath_hw *ah,
else else
ah->regulatory.max_power_level = ratesArray[i]; ah->regulatory.max_power_level = ratesArray[i];
return 0;
} }
static void ath9k_hw_4k_set_addac(struct ath_hw *ah, static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
@@ -2103,7 +2090,7 @@ static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah,
return; return;
} }
static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
int16_t *pTxPowerIndexOffset) int16_t *pTxPowerIndexOffset)
{ {
@@ -2255,13 +2242,11 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
} }
*pTxPowerIndexOffset = 0; *pTxPowerIndexOffset = 0;
return true;
#undef SM_PD_GAIN #undef SM_PD_GAIN
#undef SM_PDGAIN_B #undef SM_PDGAIN_B
} }
static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah, static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
int16_t *ratesArray, int16_t *ratesArray,
u16 cfgCtl, u16 cfgCtl,
@@ -2549,10 +2534,9 @@ static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
targetPowerCckExt.tPow2x[0]; targetPowerCckExt.tPow2x[0];
} }
} }
return true;
} }
static int ath9k_hw_def_set_txpower(struct ath_hw *ah, static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
struct ath9k_channel *chan, struct ath9k_channel *chan,
u16 cfgCtl, u16 cfgCtl,
u8 twiceAntennaReduction, u8 twiceAntennaReduction,
@@ -2575,22 +2559,13 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
} }
if (!ath9k_hw_set_def_power_per_rate_table(ah, chan, ath9k_hw_set_def_power_per_rate_table(ah, chan,
&ratesArray[0], cfgCtl, &ratesArray[0], cfgCtl,
twiceAntennaReduction, twiceAntennaReduction,
twiceMaxRegulatoryPower, twiceMaxRegulatoryPower,
powerLimit)) { powerLimit);
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
"ath9k_hw_set_txpower: unable to set "
"tx power per rate table\n");
return -EIO;
}
if (!ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset)) { ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset);
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
"ath9k_hw_set_txpower: unable to set power table\n");
return -EIO;
}
for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]); ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
@@ -2717,8 +2692,6 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
"Invalid chainmask configuration\n"); "Invalid chainmask configuration\n");
break; break;
} }
return 0;
} }
static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah, static u8 ath9k_hw_def_get_num_ant_config(struct ath_hw *ah,

2
drivers/net/wireless/ath/ath9k/eeprom.h
View File

@@ -494,7 +494,7 @@ struct eeprom_ops {
struct ath9k_channel *chan); struct ath9k_channel *chan);
void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan); void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan);
void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan); void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
int (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan, void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
u16 cfgCtl, u8 twiceAntennaReduction, u16 cfgCtl, u8 twiceAntennaReduction,
u8 twiceMaxRegulatoryPower, u8 powerLimit); u8 twiceMaxRegulatoryPower, u8 powerLimit);
u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz); u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);

57
drivers/net/wireless/ath/ath9k/hw.c
View File

@@ -1274,7 +1274,6 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
int i, regWrites = 0; int i, regWrites = 0;
struct ieee80211_channel *channel = chan->chan; struct ieee80211_channel *channel = chan->chan;
u32 modesIndex, freqIndex; u32 modesIndex, freqIndex;
int status;
switch (chan->chanmode) { switch (chan->chanmode) {
case CHANNEL_A: case CHANNEL_A:
@@ -1376,17 +1375,12 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
if (OLC_FOR_AR9280_20_LATER) if (OLC_FOR_AR9280_20_LATER)
ath9k_olc_init(ah); ath9k_olc_init(ah);
status = ah->eep_ops->set_txpower(ah, chan, ah->eep_ops->set_txpower(ah, chan,
ath9k_regd_get_ctl(&ah->regulatory, chan), ath9k_regd_get_ctl(&ah->regulatory, chan),
channel->max_antenna_gain * 2, channel->max_antenna_gain * 2,
channel->max_power * 2, channel->max_power * 2,
min((u32) MAX_RATE_POWER, min((u32) MAX_RATE_POWER,
(u32) ah->regulatory.power_limit)); (u32) ah->regulatory.power_limit));
if (status != 0) {
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
"Error initializing transmit power\n");
return -EIO;
}
if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
DPRINTF(ah->ah_sc, ATH_DBG_FATAL, DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
@@ -1701,11 +1695,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
ath9k_hw_set_regs(ah, chan, macmode); ath9k_hw_set_regs(ah, chan, macmode);
if (AR_SREV_9280_10_OR_LATER(ah)) { if (AR_SREV_9280_10_OR_LATER(ah)) {
if (!(ath9k_hw_ar9280_set_channel(ah, chan))) { ath9k_hw_ar9280_set_channel(ah, chan);
DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
"Failed to set channel\n");
return false;
}
} else { } else {
if (!(ath9k_hw_set_channel(ah, chan))) { if (!(ath9k_hw_set_channel(ah, chan))) {
DPRINTF(ah->ah_sc, ATH_DBG_FATAL, DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
@@ -1714,16 +1704,12 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
} }
} }
if (ah->eep_ops->set_txpower(ah, chan, ah->eep_ops->set_txpower(ah, chan,
ath9k_regd_get_ctl(&ah->regulatory, chan), ath9k_regd_get_ctl(&ah->regulatory, chan),
channel->max_antenna_gain * 2, channel->max_antenna_gain * 2,
channel->max_power * 2, channel->max_power * 2,
min((u32) MAX_RATE_POWER, min((u32) MAX_RATE_POWER,
(u32) ah->regulatory.power_limit)) != 0) { (u32) ah->regulatory.power_limit));
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
"Error initializing transmit power\n");
return false;
}
synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
if (IS_CHAN_B(chan)) if (IS_CHAN_B(chan))
@@ -2311,13 +2297,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
if (AR_SREV_9280_10_OR_LATER(ah)) { if (AR_SREV_9280_10_OR_LATER(ah))
if (!(ath9k_hw_ar9280_set_channel(ah, chan))) ath9k_hw_ar9280_set_channel(ah, chan);
return -EIO; else
} else {
if (!(ath9k_hw_set_channel(ah, chan))) if (!(ath9k_hw_set_channel(ah, chan)))
return -EIO; return -EIO;
}
for (i = 0; i < AR_NUM_DCU; i++) for (i = 0; i < AR_NUM_DCU; i++)
REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
@@ -3748,22 +3732,19 @@ bool ath9k_hw_disable(struct ath_hw *ah)
return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD);
} }
bool ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit)
{ {
struct ath9k_channel *chan = ah->curchan; struct ath9k_channel *chan = ah->curchan;
struct ieee80211_channel *channel = chan->chan; struct ieee80211_channel *channel = chan->chan;
ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER); ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER);
if (ah->eep_ops->set_txpower(ah, chan, ah->eep_ops->set_txpower(ah, chan,
ath9k_regd_get_ctl(&ah->regulatory, chan), ath9k_regd_get_ctl(&ah->regulatory, chan),
channel->max_antenna_gain * 2, channel->max_antenna_gain * 2,
channel->max_power * 2, channel->max_power * 2,
min((u32) MAX_RATE_POWER, min((u32) MAX_RATE_POWER,
(u32) ah->regulatory.power_limit)) != 0) (u32) ah->regulatory.power_limit));
return false;
return true;
} }
void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac)

2
drivers/net/wireless/ath/ath9k/hw.h
View File

@@ -590,7 +590,7 @@ u32 ath9k_hw_getrxfilter(struct ath_hw *ah);
void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits); void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits);
bool ath9k_hw_phy_disable(struct ath_hw *ah); bool ath9k_hw_phy_disable(struct ath_hw *ah);
bool ath9k_hw_disable(struct ath_hw *ah); bool ath9k_hw_disable(struct ath_hw *ah);
bool ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit); void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit);
void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac); void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac);
void ath9k_hw_setopmode(struct ath_hw *ah); void ath9k_hw_setopmode(struct ath_hw *ah);
void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1); void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1);

7
drivers/net/wireless/ath/ath9k/phy.c
View File

@@ -96,9 +96,8 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
return true; return true;
} }
bool void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
struct ath9k_channel *chan)
{ {
u16 bMode, fracMode, aModeRefSel = 0; u16 bMode, fracMode, aModeRefSel = 0;
u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@@ -169,8 +168,6 @@ ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
ah->curchan = chan; ah->curchan = chan;
ah->curchan_rad_index = -1; ah->curchan_rad_index = -1;
return true;
} }
static void static void

2
drivers/net/wireless/ath/ath9k/phy.h
View File

@@ -17,7 +17,7 @@
#ifndef PHY_H #ifndef PHY_H
#define PHY_H #define PHY_H
bool ath9k_hw_ar9280_set_channel(struct ath_hw *ah, void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
struct ath9k_channel struct ath9k_channel
*chan); *chan);
bool ath9k_hw_set_channel(struct ath_hw *ah, bool ath9k_hw_set_channel(struct ath_hw *ah,