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[MIPS] PMC MSP71xx mips common

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Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Marc St-Jean
2007-06-14 15:55:31 -06:00
committed by Ralf Baechle
parent 35832e26f9
commit 9267a30d1d
10 changed files with 179 additions and 2 deletions
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20
arch/mips/kernel/cpu-probe.c
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@@ -186,9 +186,29 @@ static inline void check_wait(void)
}
}
static inline void check_errata(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
switch (c->cputype) {
case CPU_34K:
/*
* Erratum "RPS May Cause Incorrect Instruction Execution"
* This code only handles VPE0, any SMP/SMTC/RTOS code
* making use of VPE1 will be responsable for that VPE.
*/
if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2)
write_c0_config7(read_c0_config7() | MIPS_CONF7_RPS);
break;
default:
break;
}
}
void __init check_bugs32(void)
{
check_wait();
check_errata();
}
/*