[PATCH] m32r: Support M32104UT target platform
This patch is for supporting a new target platform, Renesas M32104UT evaluation board. The M32104UT is an eval board based on an uT-Engine specification. This board has an MMU-less M32R family processor, M32104. http://www-wa0.personal-media.co.jp/pmc/archive/te/te_m32104_e.pdf This board is one of the most popular M32R platform, so we have ported Linux/M32R to it. Signed-off-by: Naoto Sugai <Sugai.Naoto@ak.MitsubishiElectric.co.jp> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Hirokazu Takata
committed by
Linus Torvalds
Linus Torvalds
parent
60c83c77c4
commit
9287d95ea1
@@ -16,5 +16,6 @@ obj-$(CONFIG_PLAT_M32700UT) += setup_m32700ut.o io_m32700ut.o
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obj-$(CONFIG_PLAT_OPSPUT) += setup_opsput.o io_opsput.o
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obj-$(CONFIG_MODULES) += module.o
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obj-$(CONFIG_PLAT_OAKS32R) += setup_oaks32r.o io_oaks32r.o
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obj-$(CONFIG_PLAT_M32104UT) += setup_m32104ut.o io_m32104ut.o
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EXTRA_AFLAGS := -traditional
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@@ -315,7 +315,7 @@ ENTRY(ei_handler)
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mv r1, sp ; arg1(regs)
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#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
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|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
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|| defined(CONFIG_CHIP_OPSP)
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|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
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; GET_ICU_STATUS;
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seth r0, #shigh(M32R_ICU_ISTS_ADDR)
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@@ -541,7 +541,20 @@ check_int2:
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bra check_end
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.fillinsn
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check_end:
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#endif /* CONFIG_PLAT_OPSPUT */
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#elif defined(CONFIG_PLAT_M32104UT)
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add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
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bnez r2, check_end
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; read ICU status register of PLD
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seth r0, #high(PLD_ICUISTS)
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or3 r0, r0, #low(PLD_ICUISTS)
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lduh r0, @r0
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slli r0, #21
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srli r0, #27 ; ISN
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addi r0, #(M32104UT_PLD_IRQ_BASE)
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bra check_end
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.fillinsn
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check_end:
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#endif /* CONFIG_PLAT_M32104UT */
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bl do_IRQ
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#endif /* CONFIG_SMP */
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ld r14, @sp+
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298
arch/m32r/kernel/io_m32104ut.c
Normal file
298
arch/m32r/kernel/io_m32104ut.c
Normal file
@@ -0,0 +1,298 @@
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/*
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* linux/arch/m32r/kernel/io_m32104ut.c
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*
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* Typical I/O routines for M32104UT board.
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*
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* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
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* Hitoshi Yamamoto, Mamoru Sakugawa,
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* Naoto Sugai, Hayato Fujiwara
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*/
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#include <linux/config.h>
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#include <asm/m32r.h>
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#include <asm/page.h>
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#include <asm/io.h>
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#include <asm/byteorder.h>
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#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
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#include <linux/types.h>
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#define M32R_PCC_IOMAP_SIZE 0x1000
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#define M32R_PCC_IOSTART0 0x1000
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#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
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extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
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extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
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extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
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extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
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#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
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#define PORT2ADDR(port) _port2addr(port)
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static inline void *_port2addr(unsigned long port)
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{
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return (void *)(port + NONCACHE_OFFSET);
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}
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#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
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static inline void *__port2addr_ata(unsigned long port)
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{
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static int dummy_reg;
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switch (port) {
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case 0x1f0: return (void *)0xac002000;
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case 0x1f1: return (void *)0xac012800;
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case 0x1f2: return (void *)0xac012002;
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case 0x1f3: return (void *)0xac012802;
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case 0x1f4: return (void *)0xac012004;
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case 0x1f5: return (void *)0xac012804;
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case 0x1f6: return (void *)0xac012006;
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case 0x1f7: return (void *)0xac012806;
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case 0x3f6: return (void *)0xac01200e;
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default: return (void *)&dummy_reg;
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}
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}
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#endif
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/*
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* M32104T-LAN is located in the extended bus space
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* from 0x01000000 to 0x01ffffff on physical address.
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* The base address of LAN controller(LAN91C111) is 0x300.
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*/
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#define LAN_IOSTART 0x300
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#define LAN_IOEND 0x320
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static inline void *_port2addr_ne(unsigned long port)
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{
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return (void *)(port + NONCACHE_OFFSET + 0x01000000);
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}
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static inline void delay(void)
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{
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__asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
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}
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/*
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* NIC I/O function
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*/
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#define PORT2ADDR_NE(port) _port2addr_ne(port)
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static inline unsigned char _ne_inb(void *portp)
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{
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return *(volatile unsigned char *)portp;
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}
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static inline unsigned short _ne_inw(void *portp)
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{
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return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
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}
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static inline void _ne_insb(void *portp, void *addr, unsigned long count)
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{
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unsigned char *buf = (unsigned char *)addr;
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while (count--)
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*buf++ = _ne_inb(portp);
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}
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static inline void _ne_outb(unsigned char b, void *portp)
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{
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*(volatile unsigned char *)portp = b;
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}
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static inline void _ne_outw(unsigned short w, void *portp)
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{
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*(volatile unsigned short *)portp = cpu_to_le16(w);
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}
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unsigned char _inb(unsigned long port)
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{
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if (port >= LAN_IOSTART && port < LAN_IOEND)
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return _ne_inb(PORT2ADDR_NE(port));
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return *(volatile unsigned char *)PORT2ADDR(port);
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}
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unsigned short _inw(unsigned long port)
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{
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if (port >= LAN_IOSTART && port < LAN_IOEND)
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return _ne_inw(PORT2ADDR_NE(port));
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return *(volatile unsigned short *)PORT2ADDR(port);
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}
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unsigned long _inl(unsigned long port)
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{
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return *(volatile unsigned long *)PORT2ADDR(port);
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}
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unsigned char _inb_p(unsigned long port)
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{
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unsigned char v = _inb(port);
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delay();
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return (v);
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}
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unsigned short _inw_p(unsigned long port)
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{
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unsigned short v = _inw(port);
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delay();
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return (v);
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}
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unsigned long _inl_p(unsigned long port)
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{
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unsigned long v = _inl(port);
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delay();
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return (v);
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}
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void _outb(unsigned char b, unsigned long port)
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{
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if (port >= LAN_IOSTART && port < LAN_IOEND)
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_ne_outb(b, PORT2ADDR_NE(port));
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else
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*(volatile unsigned char *)PORT2ADDR(port) = b;
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}
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void _outw(unsigned short w, unsigned long port)
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{
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if (port >= LAN_IOSTART && port < LAN_IOEND)
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_ne_outw(w, PORT2ADDR_NE(port));
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else
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*(volatile unsigned short *)PORT2ADDR(port) = w;
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}
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void _outl(unsigned long l, unsigned long port)
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{
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*(volatile unsigned long *)PORT2ADDR(port) = l;
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}
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void _outb_p(unsigned char b, unsigned long port)
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{
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_outb(b, port);
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delay();
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}
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void _outw_p(unsigned short w, unsigned long port)
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{
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_outw(w, port);
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delay();
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}
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void _outl_p(unsigned long l, unsigned long port)
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{
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_outl(l, port);
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delay();
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}
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void _insb(unsigned int port, void *addr, unsigned long count)
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{
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if (port >= LAN_IOSTART && port < LAN_IOEND)
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_ne_insb(PORT2ADDR_NE(port), addr, count);
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else {
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unsigned char *buf = addr;
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unsigned char *portp = PORT2ADDR(port);
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while (count--)
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*buf++ = *(volatile unsigned char *)portp;
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}
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}
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void _insw(unsigned int port, void *addr, unsigned long count)
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{
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unsigned short *buf = addr;
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unsigned short *portp;
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if (port >= LAN_IOSTART && port < LAN_IOEND) {
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/*
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* This portion is only used by smc91111.c to read data
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* from the DATA_REG. Do not swap the data.
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*/
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portp = PORT2ADDR_NE(port);
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while (count--)
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*buf++ = *(volatile unsigned short *)portp;
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#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
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} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
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pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
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count, 1);
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#endif
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#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
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} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
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portp = __port2addr_ata(port);
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while (count--)
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*buf++ = *(volatile unsigned short *)portp;
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#endif
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} else {
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portp = PORT2ADDR(port);
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while (count--)
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*buf++ = *(volatile unsigned short *)portp;
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}
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}
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void _insl(unsigned int port, void *addr, unsigned long count)
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{
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unsigned long *buf = addr;
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unsigned long *portp;
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portp = PORT2ADDR(port);
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while (count--)
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*buf++ = *(volatile unsigned long *)portp;
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}
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void _outsb(unsigned int port, const void *addr, unsigned long count)
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{
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const unsigned char *buf = addr;
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unsigned char *portp;
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if (port >= LAN_IOSTART && port < LAN_IOEND) {
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portp = PORT2ADDR_NE(port);
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while (count--)
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_ne_outb(*buf++, portp);
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} else {
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portp = PORT2ADDR(port);
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while (count--)
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*(volatile unsigned char *)portp = *buf++;
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}
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}
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void _outsw(unsigned int port, const void *addr, unsigned long count)
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{
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const unsigned short *buf = addr;
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unsigned short *portp;
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if (port >= LAN_IOSTART && port < LAN_IOEND) {
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/*
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* This portion is only used by smc91111.c to write data
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* into the DATA_REG. Do not swap the data.
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*/
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portp = PORT2ADDR_NE(port);
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while (count--)
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*(volatile unsigned short *)portp = *buf++;
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#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
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} else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
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portp = __port2addr_ata(port);
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while (count--)
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*(volatile unsigned short *)portp = *buf++;
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#endif
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#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
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} else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
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pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
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count, 1);
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#endif
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} else {
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portp = PORT2ADDR(port);
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while (count--)
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*(volatile unsigned short *)portp = *buf++;
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}
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}
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void _outsl(unsigned int port, const void *addr, unsigned long count)
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{
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const unsigned long *buf = addr;
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unsigned char *portp;
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portp = PORT2ADDR(port);
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while (count--)
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*(volatile unsigned long *)portp = *buf++;
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}
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@@ -320,6 +320,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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#elif defined(CONFIG_CHIP_MP)
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seq_printf(m, "cpu family\t: M32R-MP\n"
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"cache size\t: I-xxKB/D-xxKB\n");
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#elif defined(CONFIG_CHIP_M32104)
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seq_printf(m,"cpu family\t: M32104\n"
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"cache size\t: I-8KB/D-8KB\n");
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#else
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seq_printf(m, "cpu family\t: Unknown\n");
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#endif
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@@ -340,6 +343,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "Machine\t\t: uServer\n");
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#elif defined(CONFIG_PLAT_OAKS32R)
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seq_printf(m, "Machine\t\t: OAKS32R\n");
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#elif defined(CONFIG_PLAT_M32104UT)
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seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n");
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#else
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seq_printf(m, "Machine\t\t: Unknown\n");
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#endif
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@@ -389,7 +394,7 @@ unsigned long cpu_initialized __initdata = 0;
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*/
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#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
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|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
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|| defined(CONFIG_CHIP_OPSP)
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|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
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void __init cpu_init (void)
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{
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int cpu_id = smp_processor_id();
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162
arch/m32r/kernel/setup_m32104ut.c
Normal file
162
arch/m32r/kernel/setup_m32104ut.c
Normal file
@@ -0,0 +1,162 @@
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/*
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* linux/arch/m32r/kernel/setup_m32104ut.c
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*
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* Setup routines for M32104UT Board
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*
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* Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
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* Hitoshi Yamamoto, Mamoru Sakugawa,
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* Naoto Sugai, Hayato Fujiwara
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*/
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#include <linux/config.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <asm/system.h>
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#include <asm/m32r.h>
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#include <asm/io.h>
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#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
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#ifndef CONFIG_SMP
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typedef struct {
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unsigned long icucr; /* ICU Control Register */
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} icu_data_t;
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#endif /* CONFIG_SMP */
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icu_data_t icu_data[NR_IRQS];
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static void disable_m32104ut_irq(unsigned int irq)
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{
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unsigned long port, data;
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
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outl(data, port);
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}
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static void enable_m32104ut_irq(unsigned int irq)
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{
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unsigned long port, data;
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
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outl(data, port);
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}
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static void mask_and_ack_m32104ut(unsigned int irq)
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{
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disable_m32104ut_irq(irq);
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}
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static void end_m32104ut_irq(unsigned int irq)
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{
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enable_m32104ut_irq(irq);
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}
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static unsigned int startup_m32104ut_irq(unsigned int irq)
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{
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enable_m32104ut_irq(irq);
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return (0);
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}
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static void shutdown_m32104ut_irq(unsigned int irq)
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{
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unsigned long port;
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port = irq2port(irq);
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outl(M32R_ICUCR_ILEVEL7, port);
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}
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static struct hw_interrupt_type m32104ut_irq_type =
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{
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.typename = "M32104UT-IRQ",
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.startup = startup_m32104ut_irq,
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.shutdown = shutdown_m32104ut_irq,
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.enable = enable_m32104ut_irq,
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.disable = disable_m32104ut_irq,
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.ack = mask_and_ack_m32104ut,
|
||||
.end = end_m32104ut_irq
|
||||
};
|
||||
|
||||
void __init init_IRQ(void)
|
||||
{
|
||||
static int once = 0;
|
||||
|
||||
if (once)
|
||||
return;
|
||||
else
|
||||
once++;
|
||||
|
||||
#if defined(CONFIG_SMC91X)
|
||||
/* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
|
||||
irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
|
||||
irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type;
|
||||
irq_desc[M32R_IRQ_INT0].action = 0;
|
||||
irq_desc[M32R_IRQ_INT0].depth = 1;
|
||||
icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
|
||||
disable_m32104ut_irq(M32R_IRQ_INT0);
|
||||
#endif /* CONFIG_SMC91X */
|
||||
|
||||
/* MFT2 : system timer */
|
||||
irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
|
||||
irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type;
|
||||
irq_desc[M32R_IRQ_MFT2].action = 0;
|
||||
irq_desc[M32R_IRQ_MFT2].depth = 1;
|
||||
icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
|
||||
disable_m32104ut_irq(M32R_IRQ_MFT2);
|
||||
|
||||
#ifdef CONFIG_SERIAL_M32R_SIO
|
||||
/* SIO0_R : uart receive data */
|
||||
irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
|
||||
irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type;
|
||||
irq_desc[M32R_IRQ_SIO0_R].action = 0;
|
||||
irq_desc[M32R_IRQ_SIO0_R].depth = 1;
|
||||
icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
|
||||
disable_m32104ut_irq(M32R_IRQ_SIO0_R);
|
||||
|
||||
/* SIO0_S : uart send data */
|
||||
irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
|
||||
irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type;
|
||||
irq_desc[M32R_IRQ_SIO0_S].action = 0;
|
||||
irq_desc[M32R_IRQ_SIO0_S].depth = 1;
|
||||
icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
|
||||
disable_m32104ut_irq(M32R_IRQ_SIO0_S);
|
||||
#endif /* CONFIG_SERIAL_M32R_SIO */
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SMC91X)
|
||||
|
||||
#define LAN_IOSTART 0x300
|
||||
#define LAN_IOEND 0x320
|
||||
static struct resource smc91x_resources[] = {
|
||||
[0] = {
|
||||
.start = (LAN_IOSTART),
|
||||
.end = (LAN_IOEND),
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = M32R_IRQ_INT0,
|
||||
.end = M32R_IRQ_INT0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_device = {
|
||||
.name = "smc91x",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(smc91x_resources),
|
||||
.resource = smc91x_resources,
|
||||
};
|
||||
#endif
|
||||
|
||||
static int __init platform_init(void)
|
||||
{
|
||||
#if defined(CONFIG_SMC91X)
|
||||
platform_device_register(&smc91x_device);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(platform_init);
|
||||
@@ -57,7 +57,7 @@ static unsigned long do_gettimeoffset(void)
|
||||
|
||||
#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
|
||||
|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
|
||||
|| defined(CONFIG_CHIP_OPSP)
|
||||
|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
|
||||
#ifndef CONFIG_SMP
|
||||
|
||||
unsigned long count;
|
||||
@@ -268,7 +268,7 @@ void __init time_init(void)
|
||||
|
||||
#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
|
||||
|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
|
||||
|| defined(CONFIG_CHIP_OPSP)
|
||||
|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
|
||||
|
||||
/* M32102 MFT setup */
|
||||
setup_irq(M32R_IRQ_MFT2, &irq0);
|
||||
|
||||
Reference in New Issue
Block a user