From c1becedc8871645278832fabdc6fe138082a495b Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 10 Aug 2011 10:23:45 +0100 Subject: [PATCH 01/63] ARM: enable ARM_PATCH_PHYS_VIRT by default Enable virtual to physical translation patching by default in all kernels. Hide the option behind EMBEDDED. This can still be turned off if people desire, and they know what they're doing, to shrink the size of the kernel to a minimum. Acked-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ebc5d922ea1..8882a535cf44 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -195,7 +195,8 @@ config VECTORS_BASE The base address of exception vectors. config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime" + bool "Patch physical to virtual translations at runtime" if EMBEDDED + default y depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help @@ -207,6 +208,10 @@ config ARM_PATCH_PHYS_VIRT of physical memory is at a 16MB boundary, or theoretically 64K for the MSM machine class. + Only disable this option if you know that you do not require + this feature (eg, building a kernel for a single machine) and + you need to shrink the kernel to the minimal size. + config ARM_PATCH_PHYS_VIRT_16BIT def_bool y depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM @@ -301,7 +306,6 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select HAVE_CLK select CLKDEV_LOOKUP - select ARM_PATCH_PHYS_VIRT if MMU help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. From 9e775ad19f52d70a53797b4d0eb740c52b0a9567 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 12 Aug 2011 00:14:28 +0100 Subject: [PATCH 02/63] ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMs MSMs post 8x50 have 2Mb at the beginning of RAM reserved for shared memory. Since the kernel hasn't typically been told this RAM exists, PHYS_OFFSET has been set to 0xN0200000 and the memory atags passed to the kernel have matched. This doesn't play nicely with things such as AUTO_ZRELADDR, which doesn't work at all, and dynamic phys to virt, which requires an MSM specific workaround. Work around these issues by telling the kernel RAM starts at 0xN0000000 (it actually does) and fixup the atags from the bootloader (if necessary) to say the same. In addition, make sure to set TEXT_OFFSET at least 2Mb beyond the start of RAM so that the kernel doesn't end up being decompressed into shared memory. After doing this, AUTO_ZRELADDR should work on MSM with no problems and ARM_PATCH_PHYS_VIRT_16BIT should no longer be necessary. Signed-off-by: Stephen Boyd Acked-by: Nicolas Pitre Acked-by: David Brown Signed-off-by: Russell King --- arch/arm/Makefile | 3 +++ arch/arm/mach-msm/board-msm7x30.c | 22 ++++++++++++++++++++++ arch/arm/mach-msm/board-msm8960.c | 22 ++++++++++++++++++++++ arch/arm/mach-msm/board-msm8x60.c | 25 +++++++++++++++++++++++++ arch/arm/mach-msm/include/mach/memory.h | 6 +++--- 5 files changed, 75 insertions(+), 3 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 70c424eaf7b0..5665c2a3b652 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif +textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 +textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 +textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index b7a84966b711..d1e4cc83b1e6 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -42,6 +43,21 @@ extern struct sys_timer msm_timer; +static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + for (; tag->hdr.size; tag = tag_next(tag)) + if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { + tag->u.mem.start = 0; + tag->u.mem.size += SZ_2M; + } +} + +static void __init msm7x30_reserve(void) +{ + memblock_remove(0x0, SZ_2M); +} + static int hsusb_phy_init_seq[] = { 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ 0x02, 0x36, /* Disable CDR Auto Reset feature */ @@ -107,6 +123,8 @@ static void __init msm7x30_map_io(void) MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") .boot_params = PLAT_PHYS_OFFSET + 0x100, + .fixup = msm7x30_fixup, + .reserve = msm7x30_reserve, .map_io = msm7x30_map_io, .init_irq = msm7x30_init_irq, .init_machine = msm7x30_init, @@ -115,6 +133,8 @@ MACHINE_END MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") .boot_params = PLAT_PHYS_OFFSET + 0x100, + .fixup = msm7x30_fixup, + .reserve = msm7x30_reserve, .map_io = msm7x30_map_io, .init_irq = msm7x30_init_irq, .init_machine = msm7x30_init, @@ -123,6 +143,8 @@ MACHINE_END MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") .boot_params = PLAT_PHYS_OFFSET + 0x100, + .fixup = msm7x30_fixup, + .reserve = msm7x30_reserve, .map_io = msm7x30_map_io, .init_irq = msm7x30_init_irq, .init_machine = msm7x30_init, diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 35c7ceeb3f29..b04468e7d00e 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c @@ -20,16 +20,34 @@ #include #include #include +#include #include #include #include +#include #include #include #include "devices.h" +static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + for (; tag->hdr.size; tag = tag_next(tag)) + if (tag->hdr.tag == ATAG_MEM && + tag->u.mem.start == 0x40200000) { + tag->u.mem.start = 0x40000000; + tag->u.mem.size += SZ_2M; + } +} + +static void __init msm8960_reserve(void) +{ + memblock_remove(0x40000000, SZ_2M); +} + static void __init msm8960_map_io(void) { msm_map_msm8960_io(); @@ -76,6 +94,8 @@ static void __init msm8960_rumi3_init(void) } MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") + .fixup = msm8960_fixup, + .reserve = msm8960_reserve, .map_io = msm8960_map_io, .init_irq = msm8960_init_irq, .timer = &msm_timer, @@ -83,6 +103,8 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") MACHINE_END MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") + .fixup = msm8960_fixup, + .reserve = msm8960_reserve, .map_io = msm8960_map_io, .init_irq = msm8960_init_irq, .timer = &msm_timer, diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 1163b6fd05d2..9221f54778be 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -20,14 +20,31 @@ #include #include #include +#include #include #include #include +#include #include #include +static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, + char **cmdline, struct meminfo *mi) +{ + for (; tag->hdr.size; tag = tag_next(tag)) + if (tag->hdr.tag == ATAG_MEM && + tag->u.mem.start == 0x40200000) { + tag->u.mem.start = 0x40000000; + tag->u.mem.size += SZ_2M; + } +} + +static void __init msm8x60_reserve(void) +{ + memblock_remove(0x40000000, SZ_2M); +} static void __init msm8x60_map_io(void) { @@ -65,6 +82,8 @@ static void __init msm8x60_init(void) } MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, @@ -72,6 +91,8 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") MACHINE_END MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, @@ -79,6 +100,8 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") MACHINE_END MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, @@ -86,6 +109,8 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") MACHINE_END MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") + .fixup = msm8x60_fixup, + .reserve = msm8x60_reserve, .map_io = msm8x60_map_io, .init_irq = msm8x60_init_irq, .init_machine = msm8x60_init, diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h index f2f8d299ba95..58d5e7eec431 100644 --- a/arch/arm/mach-msm/include/mach/memory.h +++ b/arch/arm/mach-msm/include/mach/memory.h @@ -22,11 +22,11 @@ #elif defined(CONFIG_ARCH_QSD8X50) #define PLAT_PHYS_OFFSET UL(0x20000000) #elif defined(CONFIG_ARCH_MSM7X30) -#define PLAT_PHYS_OFFSET UL(0x00200000) +#define PLAT_PHYS_OFFSET UL(0x00000000) #elif defined(CONFIG_ARCH_MSM8X60) -#define PLAT_PHYS_OFFSET UL(0x40200000) +#define PLAT_PHYS_OFFSET UL(0x40000000) #elif defined(CONFIG_ARCH_MSM8960) -#define PLAT_PHYS_OFFSET UL(0x40200000) +#define PLAT_PHYS_OFFSET UL(0x40000000) #else #define PLAT_PHYS_OFFSET UL(0x10000000) #endif From daece59689e76ed55d8863cae04993679a8e844e Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 12 Aug 2011 00:14:29 +0100 Subject: [PATCH 03/63] ARM: 7013/1: P2V: Remove ARM_PATCH_PHYS_VIRT_16BIT This code can be removed now that MSM targets no longer need the 16-bit offsets for P2V. Signed-off-by: Nicolas Pitre Signed-off-by: Stephen Boyd Signed-off-by: Russell King --- arch/arm/Kconfig | 10 +----- arch/arm/include/asm/memory.h | 7 ---- arch/arm/include/asm/module.h | 4 --- arch/arm/kernel/head.S | 61 ++++++++--------------------------- 4 files changed, 14 insertions(+), 68 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8882a535cf44..272eadc7a12c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -205,20 +205,12 @@ config ARM_PATCH_PHYS_VIRT kernel in system memory. This can only be used with non-XIP MMU kernels where the base - of physical memory is at a 16MB boundary, or theoretically 64K - for the MSM machine class. + of physical memory is at a 16MB boundary. Only disable this option if you know that you do not require this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. -config ARM_PATCH_PHYS_VIRT_16BIT - def_bool y - depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM - help - This option extends the physical to virtual translation patching - to allow physical memory down to a theoretical minimum of 64K - boundaries. source "init/Kconfig" diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index b8de516e600e..441fc4fe8263 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -160,7 +160,6 @@ * so that all we need to do is modify the 8-bit constant field. */ #define __PV_BITS_31_24 0x81000000 -#define __PV_BITS_23_16 0x00810000 extern unsigned long __pv_phys_offset; #define PHYS_OFFSET __pv_phys_offset @@ -178,9 +177,6 @@ static inline unsigned long __virt_to_phys(unsigned long x) { unsigned long t; __pv_stub(x, t, "add", __PV_BITS_31_24); -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - __pv_stub(t, t, "add", __PV_BITS_23_16); -#endif return t; } @@ -188,9 +184,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) { unsigned long t; __pv_stub(x, t, "sub", __PV_BITS_31_24); -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - __pv_stub(t, t, "sub", __PV_BITS_23_16); -#endif return t; } #else diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h index 543b44916d2c..6c6809f982f1 100644 --- a/arch/arm/include/asm/module.h +++ b/arch/arm/include/asm/module.h @@ -31,11 +31,7 @@ struct mod_arch_specific { /* Add __virt_to_phys patching state as well */ #ifdef CONFIG_ARM_PATCH_PHYS_VIRT -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT -#define MODULE_ARCH_VERMAGIC_P2V "p2v16 " -#else #define MODULE_ARCH_VERMAGIC_P2V "p2v8 " -#endif #else #define MODULE_ARCH_VERMAGIC_P2V "" #endif diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 742b6108a001..136abb610948 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -488,13 +488,8 @@ __fixup_pv_table: add r5, r5, r3 @ adjust table end address add r7, r7, r3 @ adjust __pv_phys_offset address str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset -#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT mov r6, r3, lsr #24 @ constant for add/sub instructions teq r3, r6, lsl #24 @ must be 16MiB aligned -#else - mov r6, r3, lsr #16 @ constant for add/sub instructions - teq r3, r6, lsl #16 @ must be 64kiB aligned -#endif THUMB( it ne @ cross section branch ) bne __error str r6, [r7, #4] @ save to __pv_offset @@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table) .text __fixup_a_pv_table: #ifdef CONFIG_THUMB2_KERNEL -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - lsls r0, r6, #24 - lsr r6, #8 - beq 1f - clz r7, r0 - lsr r0, #24 - lsl r0, r7 - bic r0, 0x0080 - lsrs r7, #1 - orrcs r0, #0x0080 - orr r0, r0, r7, lsl #12 -#endif -1: lsls r6, #24 - beq 4f + lsls r6, #24 + beq 2f clz r7, r6 lsr r6, #24 lsl r6, r7 @@ -532,43 +515,25 @@ __fixup_a_pv_table: orrcs r6, #0x0080 orr r6, r6, r7, lsl #12 orr r6, #0x4000 - b 4f -2: @ at this point the C flag is always clear - add r7, r3 -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - ldrh ip, [r7] - tst ip, 0x0400 @ the i bit tells us LS or MS byte - beq 3f - cmp r0, #0 @ set C flag, and ... - biceq ip, 0x0400 @ immediate zero value has a special encoding - streqh ip, [r7] @ that requires the i bit cleared -#endif -3: ldrh ip, [r7, #2] + b 2f +1: add r7, r3 + ldrh ip, [r7, #2] and ip, 0x8f00 - orrcc ip, r6 @ mask in offset bits 31-24 - orrcs ip, r0 @ mask in offset bits 23-16 + orr ip, r6 @ mask in offset bits 31-24 strh ip, [r7, #2] -4: cmp r4, r5 +2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot - bcc 2b + bcc 1b bx lr #else -#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT - and r0, r6, #255 @ offset bits 23-16 - mov r6, r6, lsr #8 @ offset bits 31-24 -#else - mov r0, #0 @ just in case... -#endif - b 3f -2: ldr ip, [r7, r3] + b 2f +1: ldr ip, [r7, r3] bic ip, ip, #0x000000ff - tst ip, #0x400 @ rotate shift tells us LS or MS byte - orrne ip, ip, r6 @ mask in offset bits 31-24 - orreq ip, ip, r0 @ mask in offset bits 23-16 + orr ip, ip, r6 @ mask in offset bits 31-24 str ip, [r7, r3] -3: cmp r4, r5 +2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot - bcc 2b + bcc 1b mov pc, lr #endif ENDPROC(__fixup_a_pv_table) From 98b0124f0e2b88ec74cbd9345cf6195e527ce251 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 21:05:10 -0400 Subject: [PATCH 04/63] ARM: mach-prima2: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size Original comment: Restrict DMA-able region to workaround silicon limitation. The limitation restricts buffers available for DMA to SD/MMC hardware to be below 256MB. Signed-off-by: Nicolas Pitre --- arch/arm/mach-prima2/include/mach/memory.h | 7 ------- arch/arm/mach-prima2/prima2.c | 1 + 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/arm/mach-prima2/include/mach/memory.h b/arch/arm/mach-prima2/include/mach/memory.h index 368cd5a0601a..0d5ee6af8c54 100644 --- a/arch/arm/mach-prima2/include/mach/memory.h +++ b/arch/arm/mach-prima2/include/mach/memory.h @@ -11,11 +11,4 @@ #define PLAT_PHYS_OFFSET UL(0x00000000) -/* - * Restrict DMA-able region to workaround silicon limitation. - * The limitation restricts buffers available for DMA to SD/MMC - * hardware to be below 256MB - */ -#define ARM_DMA_ZONE_SIZE (SZ_256M) - #endif diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c index 5654a04319fd..ee33c3d458f5 100644 --- a/arch/arm/mach-prima2/prima2.c +++ b/arch/arm/mach-prima2/prima2.c @@ -36,6 +36,7 @@ MACHINE_START(PRIMA2_EVB, "prima2cb") .map_io = sirfsoc_map_lluart, .init_irq = sirfsoc_of_irq_init, .timer = &sirfsoc_timer, + .dma_zone_size = SZ_256M, .init_machine = sirfsoc_mach_init, .dt_compat = prima2cb_dt_match, MACHINE_END From 60f96b41f71d2a13d1c0a457b8b77958f77142d1 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Fri, 9 Sep 2011 13:59:35 +0530 Subject: [PATCH 05/63] genirq: Add IRQCHIP_SKIP_SET_WAKE flag Some irq chips need the irq_set_wake() functionality, but do not require a irq_set_wake() callback. Instead of forcing an empty callback to be implemented add a flag which notes this fact. Check for the flag in set_irq_wake_real() and return success when set. Signed-off-by: Santosh Shilimkar Cc: Thomas Gleixner --- include/linux/irq.h | 2 ++ kernel/irq/manage.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/linux/irq.h b/include/linux/irq.h index 59517300a315..73e31abeba1c 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -336,12 +336,14 @@ struct irq_chip { * IRQCHIP_MASK_ON_SUSPEND: Mask non wake irqs in the suspend path * IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks * when irq enabled + * IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip */ enum { IRQCHIP_SET_TYPE_MASKED = (1 << 0), IRQCHIP_EOI_IF_HANDLED = (1 << 1), IRQCHIP_MASK_ON_SUSPEND = (1 << 2), IRQCHIP_ONOFFLINE_ENABLED = (1 << 3), + IRQCHIP_SKIP_SET_WAKE = (1 << 4), }; /* This include will go away once we isolated irq_desc usage to core code */ diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 9b956fa20308..7e1a3ed1e61a 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -467,6 +467,9 @@ static int set_irq_wake_real(unsigned int irq, unsigned int on) struct irq_desc *desc = irq_to_desc(irq); int ret = -ENXIO; + if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE) + return 0; + if (desc->irq_data.chip->irq_set_wake) ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); From 57c89707dae01e0142e7185b6e8ff71b120f4c4d Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 30 Aug 2011 00:08:49 -0400 Subject: [PATCH 06/63] musb_debugfs.c: remove unneeded includes on ARM Nothing actually requires that , nor be included here. Signed-off-by: Nicolas Pitre Acked-by: Felipe Balbi --- drivers/usb/musb/musb_debugfs.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/usb/musb/musb_debugfs.c b/drivers/usb/musb/musb_debugfs.c index b0176e4569e0..61f4ee466df7 100644 --- a/drivers/usb/musb/musb_debugfs.c +++ b/drivers/usb/musb/musb_debugfs.c @@ -41,12 +41,6 @@ #include #include -#ifdef CONFIG_ARM -#include -#include -#include -#endif - #include #include "musb_core.h" From 639da5ee374ba8f070690bbd355ca30139ce145a Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Wed, 31 Aug 2011 22:55:46 -0400 Subject: [PATCH 07/63] ARM: add an extra temp register to the low level debugging addruart macro Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre Reviewed-by: Kevin Hilman --- arch/arm/kernel/debug.S | 4 ++-- arch/arm/kernel/head.S | 2 +- arch/arm/mach-at91/include/mach/debug-macro.S | 2 +- arch/arm/mach-clps711x/include/mach/debug-macro.S | 2 +- arch/arm/mach-cns3xxx/include/mach/debug-macro.S | 2 +- arch/arm/mach-davinci/include/mach/debug-macro.S | 2 +- arch/arm/mach-dove/include/mach/debug-macro.S | 2 +- arch/arm/mach-ebsa110/include/mach/debug-macro.S | 2 +- arch/arm/mach-ep93xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-exynos4/include/mach/debug-macro.S | 2 +- arch/arm/mach-footbridge/include/mach/debug-macro.S | 4 ++-- arch/arm/mach-gemini/include/mach/debug-macro.S | 2 +- arch/arm/mach-h720x/include/mach/debug-macro.S | 2 +- arch/arm/mach-integrator/include/mach/debug-macro.S | 2 +- arch/arm/mach-iop13xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-iop32x/include/mach/debug-macro.S | 2 +- arch/arm/mach-iop33x/include/mach/debug-macro.S | 2 +- arch/arm/mach-ixp2000/include/mach/debug-macro.S | 2 +- arch/arm/mach-ixp23xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-ixp4xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-kirkwood/include/mach/debug-macro.S | 2 +- arch/arm/mach-ks8695/include/mach/debug-macro.S | 2 +- arch/arm/mach-l7200/include/mach/debug-macro.S | 2 +- arch/arm/mach-lpc32xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-mmp/include/mach/debug-macro.S | 2 +- arch/arm/mach-msm/include/mach/debug-macro.S | 4 ++-- arch/arm/mach-mv78xx0/include/mach/debug-macro.S | 2 +- arch/arm/mach-mxs/include/mach/debug-macro.S | 2 +- arch/arm/mach-netx/include/mach/debug-macro.S | 2 +- arch/arm/mach-nomadik/include/mach/debug-macro.S | 2 +- arch/arm/mach-omap1/include/mach/debug-macro.S | 2 +- arch/arm/mach-omap2/include/mach/debug-macro.S | 2 +- arch/arm/mach-orion5x/include/mach/debug-macro.S | 2 +- arch/arm/mach-pnx4008/include/mach/debug-macro.S | 2 +- arch/arm/mach-prima2/include/mach/debug-macro.S | 2 +- arch/arm/mach-pxa/include/mach/debug-macro.S | 2 +- arch/arm/mach-realview/include/mach/debug-macro.S | 2 +- arch/arm/mach-rpc/include/mach/debug-macro.S | 2 +- arch/arm/mach-s3c2410/include/mach/debug-macro.S | 2 +- arch/arm/mach-s3c64xx/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5p64x0/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5pc100/include/mach/debug-macro.S | 2 +- arch/arm/mach-s5pv210/include/mach/debug-macro.S | 2 +- arch/arm/mach-sa1100/include/mach/debug-macro.S | 2 +- arch/arm/mach-shark/include/mach/debug-macro.S | 2 +- arch/arm/mach-tegra/include/mach/debug-macro.S | 2 +- arch/arm/mach-u300/include/mach/debug-macro.S | 2 +- arch/arm/mach-ux500/include/mach/debug-macro.S | 2 +- arch/arm/mach-versatile/include/mach/debug-macro.S | 2 +- arch/arm/mach-vexpress/include/mach/debug-macro.S | 2 +- arch/arm/mach-vt8500/include/mach/debug-macro.S | 2 +- arch/arm/mach-zynq/include/mach/debug-macro.S | 2 +- arch/arm/plat-mxc/include/mach/debug-macro.S | 2 +- arch/arm/plat-spear/include/plat/debug-macro.S | 2 +- arch/arm/plat-tcc/include/mach/debug-macro.S | 2 +- 55 files changed, 58 insertions(+), 58 deletions(-) diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index bcd66e00bdbe..b7685f1bb04a 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -22,7 +22,7 @@ #if defined(CONFIG_DEBUG_ICEDCC) @@ debug using ARM EmbeddedICE DCC channel - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp .endm #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) @@ -106,7 +106,7 @@ #ifdef CONFIG_MMU .macro addruart_current, rx, tmp1, tmp2 - addruart \tmp1, \tmp2 + addruart \tmp1, \tmp2, \rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 moveq \rx, \tmp1 diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 136abb610948..7408fd506656 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -234,7 +234,7 @@ __create_page_tables: * This allows debug messages to be output * via a serial console before paging_init. */ - addruart r7, r3 + addruart r7, r3, r0 mov r3, r3, lsr #20 mov r3, r3, lsl #2 diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index bc1e0b2e2f4f..0ed8648c6452 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) .endm diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index 507c6873b7ee..b802e8a51831 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp #ifndef CONFIG_DEBUG_CLPS711X_UART2 mov \rp, #0x0000 @ UART1 #else diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S index 56d828634db5..d04c150baa1c 100644 --- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S @@ -10,7 +10,7 @@ * published by the Free Software Foundation. */ - .macro addruart,rp,rv + .macro addruart,rp,rv,tmp mov \rp, #0x00009000 orr \rv, \rp, #0xf0000000 @ virtual base orr \rp, \rp, #0x10000000 diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index f8b7ea4f6235..3cf4c1b4f33a 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S @@ -32,7 +32,7 @@ davinci_uart_phys: .word 0 davinci_uart_virt: .word 0 .popsection - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp /* Use davinci_uart_phys/virt if already configured */ 10: mrc p15, 0, \rp, c1, c0 diff --git a/arch/arm/mach-dove/include/mach/debug-macro.S b/arch/arm/mach-dove/include/mach/debug-macro.S index da8bf2bad3b1..5929cbc59161 100644 --- a/arch/arm/mach-dove/include/mach/debug-macro.S +++ b/arch/arm/mach-dove/include/mach/debug-macro.S @@ -8,7 +8,7 @@ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =DOVE_SB_REGS_PHYS_BASE ldr \rv, =DOVE_SB_REGS_VIRT_BASE orr \rp, \rp, #0x00012000 diff --git a/arch/arm/mach-ebsa110/include/mach/debug-macro.S b/arch/arm/mach-ebsa110/include/mach/debug-macro.S index 7ef5690fd08c..bb02c05e6812 100644 --- a/arch/arm/mach-ebsa110/include/mach/debug-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * **/ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0xf0000000 orr \rp, \rp, #0x00000be0 mov \rp, \rv diff --git a/arch/arm/mach-ep93xx/include/mach/debug-macro.S b/arch/arm/mach-ep93xx/include/mach/debug-macro.S index b25bc9076367..af54e43132cf 100644 --- a/arch/arm/mach-ep93xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ep93xx/include/mach/debug-macro.S @@ -11,7 +11,7 @@ */ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base orr \rp, \rp, #0x000c0000 diff --git a/arch/arm/mach-exynos4/include/mach/debug-macro.S b/arch/arm/mach-exynos4/include/mach/debug-macro.S index a442ef861167..6cacf16a67a6 100644 --- a/arch/arm/mach-exynos4/include/mach/debug-macro.S +++ b/arch/arm/mach-exynos4/include/mach/debug-macro.S @@ -20,7 +20,7 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, = S3C_PA_UART ldr \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S index 1be2eeb7a0a0..e5acde25ffc5 100644 --- a/arch/arm/mach-footbridge/include/mach/debug-macro.S +++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S @@ -15,7 +15,7 @@ #ifndef CONFIG_DEBUG_DC21285_PORT /* For NetWinder debugging */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x000003f8 orr \rv, \rp, #0xff000000 @ virtual orr \rp, \rp, #0x7c000000 @ physical @@ -31,7 +31,7 @@ .equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp .if dc21285_low mov \rp, #dc21285_low .else diff --git a/arch/arm/mach-gemini/include/mach/debug-macro.S b/arch/arm/mach-gemini/include/mach/debug-macro.S index f40e006d296e..837670763b85 100644 --- a/arch/arm/mach-gemini/include/mach/debug-macro.S +++ b/arch/arm/mach-gemini/include/mach/debug-macro.S @@ -11,7 +11,7 @@ */ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =GEMINI_UART_BASE @ physical ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual .endm diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S index c2093e835720..8a46157b0582 100644 --- a/arch/arm/mach-h720x/include/mach/debug-macro.S +++ b/arch/arm/mach-h720x/include/mach/debug-macro.S @@ -16,7 +16,7 @@ .equ io_virt, IO_VIRT .equ io_phys, IO_PHYS - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00020000 @ UART1 add \rv, \rp, #io_virt @ virtual address add \rp, \rp, #io_phys @ physical base address diff --git a/arch/arm/mach-integrator/include/mach/debug-macro.S b/arch/arm/mach-integrator/include/mach/debug-macro.S index a1f598fd3a56..411b116077e4 100644 --- a/arch/arm/mach-integrator/include/mach/debug-macro.S +++ b/arch/arm/mach-integrator/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x16000000 @ physical base address mov \rv, #0xf0000000 @ virtual base add \rv, \rv, #0x16000000 >> 4 diff --git a/arch/arm/mach-iop13xx/include/mach/debug-macro.S b/arch/arm/mach-iop13xx/include/mach/debug-macro.S index e664466d51bf..d869a6f67e5c 100644 --- a/arch/arm/mach-iop13xx/include/mach/debug-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * published by the Free Software Foundation. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00002300 orr \rp, \rp, #0x00000040 orr \rv, \rp, #0xfe000000 @ virtual diff --git a/arch/arm/mach-iop32x/include/mach/debug-macro.S b/arch/arm/mach-iop32x/include/mach/debug-macro.S index ff9e76c09f35..363bdf90b34d 100644 --- a/arch/arm/mach-iop32x/include/mach/debug-macro.S +++ b/arch/arm/mach-iop32x/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * published by the Free Software Foundation. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0xfe000000 @ physical as well as virtual orr \rp, \rp, #0x00800000 @ location of the UART mov \rv, \rp diff --git a/arch/arm/mach-iop33x/include/mach/debug-macro.S b/arch/arm/mach-iop33x/include/mach/debug-macro.S index 40c500dd1fac..361be1f6026e 100644 --- a/arch/arm/mach-iop33x/include/mach/debug-macro.S +++ b/arch/arm/mach-iop33x/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * published by the Free Software Foundation. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00ff0000 orr \rp, \rp, #0x0000f700 orr \rv, #0xfe000000 @ virtual diff --git a/arch/arm/mach-ixp2000/include/mach/debug-macro.S b/arch/arm/mach-ixp2000/include/mach/debug-macro.S index 0ef533b20972..bdd3ccdc2890 100644 --- a/arch/arm/mach-ixp2000/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00030000 #ifdef __ARMEB__ orr \rp, \rp, #0x00000003 diff --git a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S index f7c6eef7fa22..5ff524c13744 100644 --- a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S @@ -12,7 +12,7 @@ */ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual #ifdef __ARMEB__ diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S index b974a49c0aff..8c9f8d564492 100644 --- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S @@ -10,7 +10,7 @@ * published by the Free Software Foundation. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp #ifdef __ARMEB__ mov \rp, #3 @ Uart regs are at off set of 3 if @ byte writes used - Big Endian. diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S index db06ae437d08..f785d401a607 100644 --- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S @@ -8,7 +8,7 @@ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =KIRKWOOD_REGS_PHYS_BASE ldr \rv, =KIRKWOOD_REGS_VIRT_BASE orr \rp, \rp, #0x00012000 diff --git a/arch/arm/mach-ks8695/include/mach/debug-macro.S b/arch/arm/mach-ks8695/include/mach/debug-macro.S index bf516adf1925..a79e48981202 100644 --- a/arch/arm/mach-ks8695/include/mach/debug-macro.S +++ b/arch/arm/mach-ks8695/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =KS8695_UART_PA @ physical base address ldr \rv, =KS8695_UART_VA @ virtual base address .endm diff --git a/arch/arm/mach-l7200/include/mach/debug-macro.S b/arch/arm/mach-l7200/include/mach/debug-macro.S index b0a2db77d392..0b4e760159b9 100644 --- a/arch/arm/mach-l7200/include/mach/debug-macro.S +++ b/arch/arm/mach-l7200/include/mach/debug-macro.S @@ -14,7 +14,7 @@ .equ io_virt, IO_BASE .equ io_phys, IO_START - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00044000 @ UART1 @ mov \rp, #0x00045000 @ UART2 add \rv, \rp, #io_virt @ virtual address diff --git a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S index 629e744aeb9e..351bd6c84909 100644 --- a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S @@ -20,7 +20,7 @@ * Debug output is hardcoded to standard UART 5 */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldreq \rp, =0x40090000 ldrne \rv, =0xF4090000 .endm diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S index 7e2ebd3efc7c..b6f14d203c25 100644 --- a/arch/arm/mach-mmp/include/mach/debug-macro.S +++ b/arch/arm/mach-mmp/include/mach/debug-macro.S @@ -11,7 +11,7 @@ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =APB_PHYS_BASE @ physical ldr \rv, =APB_VIRT_BASE @ virtual orr \rp, \rp, #0x00017000 diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 646b99ebc773..2dc73ccddb11 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -20,7 +20,7 @@ #include #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =MSM_DEBUG_UART_PHYS ldr \rv, =MSM_DEBUG_UART_BASE .endm @@ -37,7 +37,7 @@ beq 1001b .endm #else - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rv, #0xff000000 orr \rv, \rv, #0x00f00000 .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S index 04891428e48b..a7df02b049b7 100644 --- a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S @@ -8,7 +8,7 @@ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =MV78XX0_REGS_PHYS_BASE ldr \rv, =MV78XX0_REGS_VIRT_BASE orr \rp, \rp, #0x00012000 diff --git a/arch/arm/mach-mxs/include/mach/debug-macro.S b/arch/arm/mach-mxs/include/mach/debug-macro.S index 79650a1ad78d..714570d83668 100644 --- a/arch/arm/mach-mxs/include/mach/debug-macro.S +++ b/arch/arm/mach-mxs/include/mach/debug-macro.S @@ -30,7 +30,7 @@ #define UART_VADDR MXS_IO_ADDRESS(UART_PADDR) - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =UART_PADDR @ physical ldr \rv, =UART_VADDR @ virtual .endm diff --git a/arch/arm/mach-netx/include/mach/debug-macro.S b/arch/arm/mach-netx/include/mach/debug-macro.S index 56a915228180..247781e096e2 100644 --- a/arch/arm/mach-netx/include/mach/debug-macro.S +++ b/arch/arm/mach-netx/include/mach/debug-macro.S @@ -13,7 +13,7 @@ #include "hardware.h" - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00000a00 orr \rv, \rp, #io_p2v(0x00100000) @ virtual orr \rp, \rp, #0x00100000 @ physical diff --git a/arch/arm/mach-nomadik/include/mach/debug-macro.S b/arch/arm/mach-nomadik/include/mach/debug-macro.S index e7151b4b8889..735417922ce2 100644 --- a/arch/arm/mach-nomadik/include/mach/debug-macro.S +++ b/arch/arm/mach-nomadik/include/mach/debug-macro.S @@ -10,7 +10,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00100000 add \rp, \rp, #0x000fb000 add \rv, \rp, #0xf0000000 @ virtual base diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index 62856044eb63..f944ae8abc97 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -31,7 +31,7 @@ omap_uart_virt: .word 0x0 * the desired UART phys and virt addresses temporarily into * the omap_uart_phys and omap_uart_virt above. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp /* Use omap_uart_phys/virt if already configured */ 9: mrc p15, 0, \rp, c1, c0 diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 48adfe9fe4f3..fbd23ec81a20 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -34,7 +34,7 @@ omap_uart_lsr: .word 0 * the desired UART phys and virt addresses temporarily into * the omap_uart_phys and omap_uart_virt above. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp /* Use omap_uart_phys/virt if already configured */ 10: mrc p15, 0, \rp, c1, c0 diff --git a/arch/arm/mach-orion5x/include/mach/debug-macro.S b/arch/arm/mach-orion5x/include/mach/debug-macro.S index 5e3bf5b68aec..f340ed8f8dd0 100644 --- a/arch/arm/mach-orion5x/include/mach/debug-macro.S +++ b/arch/arm/mach-orion5x/include/mach/debug-macro.S @@ -10,7 +10,7 @@ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =ORION5X_REGS_PHYS_BASE ldr \rv, =ORION5X_REGS_VIRT_BASE orr \rp, \rp, #0x00012000 diff --git a/arch/arm/mach-pnx4008/include/mach/debug-macro.S b/arch/arm/mach-pnx4008/include/mach/debug-macro.S index 931afebaf064..469d60d97f5c 100644 --- a/arch/arm/mach-pnx4008/include/mach/debug-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00090000 add \rv, \rp, #0xf4000000 @ virtual add \rp, \rp, #0x40000000 @ physical diff --git a/arch/arm/mach-prima2/include/mach/debug-macro.S b/arch/arm/mach-prima2/include/mach/debug-macro.S index bf75106333ff..cd97492bb075 100644 --- a/arch/arm/mach-prima2/include/mach/debug-macro.S +++ b/arch/arm/mach-prima2/include/mach/debug-macro.S @@ -9,7 +9,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual .endm diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S index 7d5c75125d65..70b112e8ef68 100644 --- a/arch/arm/mach-pxa/include/mach/debug-macro.S +++ b/arch/arm/mach-pxa/include/mach/debug-macro.S @@ -13,7 +13,7 @@ #include "hardware.h" - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00100000 orr \rv, \rp, #io_p2v(0x40000000) @ virtual orr \rp, \rp, #0x40000000 @ physical diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S index 90b687cbe04e..fb4901c4ef04 100644 --- a/arch/arm/mach-realview/include/mach/debug-macro.S +++ b/arch/arm/mach-realview/include/mach/debug-macro.S @@ -33,7 +33,7 @@ #error "Unknown RealView platform" #endif - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #DEBUG_LL_UART_OFFSET orr \rv, \rp, #0xfb000000 @ virtual base orr \rp, \rp, #0x10000000 @ physical base diff --git a/arch/arm/mach-rpc/include/mach/debug-macro.S b/arch/arm/mach-rpc/include/mach/debug-macro.S index 85effffdc2b2..6d28cc99b124 100644 --- a/arch/arm/mach-rpc/include/mach/debug-macro.S +++ b/arch/arm/mach-rpc/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00010000 orr \rp, \rp, #0x00000fe0 orr \rv, \rp, #0xe0000000 @ virtual diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S index 5882deaa56be..4135de87d1f7 100644 --- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S @@ -19,7 +19,7 @@ #define S3C2410_UART1_OFF (0x4000) #define SHIFT_2440TXF (14-9) - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, = S3C24XX_PA_UART ldr \rv, = S3C24XX_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index a29e70550c70..c0c076a90f27 100644 --- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S @@ -21,7 +21,7 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, = S3C_PA_UART ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) #if CONFIG_DEBUG_S3C_UART != 0 diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S index 79b04e6a6f8e..e80ba3c69814 100644 --- a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S +++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S @@ -15,7 +15,7 @@ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0xE0000000 orr \rp, \rp, #0x00100000 ldr \rp, [\rp, #0x118 ] diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index b2ba95ddf8e0..694f75937000 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S @@ -22,7 +22,7 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, = S3C_PA_UART ldr \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S index 169fe654a59e..79e55597ab63 100644 --- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S @@ -21,7 +21,7 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, = S3C_PA_UART ldr \rv, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S index 0cd0fc9635b6..530772d937ad 100644 --- a/arch/arm/mach-sa1100/include/mach/debug-macro.S +++ b/arch/arm/mach-sa1100/include/mach/debug-macro.S @@ -12,7 +12,7 @@ */ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mrc p15, 0, \rp, c1, c0 tst \rp, #1 @ MMU enabled? moveq \rp, #0x80000000 @ physical base address diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index a473f55dc71f..20eb2bf2a42b 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0xe0000000 orr \rp, \rp, #0x000003f8 mov \rv, \rp diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index e0ebe65c1657..619abc63aee8 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S @@ -21,7 +21,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =IO_APB_PHYS @ physical ldr \rv, =IO_APB_VIRT @ virtual orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF) diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S index df715707bead..8ae8e4ab34b0 100644 --- a/arch/arm/mach-u300/include/mach/debug-macro.S +++ b/arch/arm/mach-u300/include/mach/debug-macro.S @@ -10,7 +10,7 @@ */ #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp /* If we move the address using MMU, use this. */ ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S index 700fb05ee815..8d74d927d4e2 100644 --- a/arch/arm/mach-ux500/include/mach/debug-macro.S +++ b/arch/arm/mach-ux500/include/mach/debug-macro.S @@ -35,7 +35,7 @@ #define UX500_UART(n) __UX500_UART(n) #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =UART_BASE @ no, physical address ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address .endm diff --git a/arch/arm/mach-versatile/include/mach/debug-macro.S b/arch/arm/mach-versatile/include/mach/debug-macro.S index eb2cf7dc5c44..d0fbd7f1cb00 100644 --- a/arch/arm/mach-versatile/include/mach/debug-macro.S +++ b/arch/arm/mach-versatile/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x001F0000 orr \rp, \rp, #0x00001000 orr \rv, \rp, #0xf1000000 @ virtual base diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S index 050d65e02a42..fd9e6c7ea49f 100644 --- a/arch/arm/mach-vexpress/include/mach/debug-macro.S +++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S @@ -12,7 +12,7 @@ #define DEBUG_LL_UART_OFFSET 0x00009000 - .macro addruart,rp,rv + .macro addruart,rp,rv,tmp mov \rp, #DEBUG_LL_UART_OFFSET orr \rv, \rp, #0xf8000000 @ virtual base orr \rp, \rp, #0x10000000 @ physical base diff --git a/arch/arm/mach-vt8500/include/mach/debug-macro.S b/arch/arm/mach-vt8500/include/mach/debug-macro.S index f1191626ad51..ca292f29d4a3 100644 --- a/arch/arm/mach-vt8500/include/mach/debug-macro.S +++ b/arch/arm/mach-vt8500/include/mach/debug-macro.S @@ -11,7 +11,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #0x00200000 orr \rv, \rp, #0xf8000000 orr \rp, \rp, #0xd8000000 diff --git a/arch/arm/mach-zynq/include/mach/debug-macro.S b/arch/arm/mach-zynq/include/mach/debug-macro.S index 9f664d5eb81d..3ab0be1f6191 100644 --- a/arch/arm/mach-zynq/include/mach/debug-macro.S +++ b/arch/arm/mach-zynq/include/mach/debug-macro.S @@ -17,7 +17,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =LL_UART_PADDR @ physical ldr \rv, =LL_UART_VADDR @ virtual .endm diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index e4dde91f0231..a3045937fc2f 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -54,7 +54,7 @@ #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp ldr \rp, =UART_PADDR @ physical ldr \rv, =UART_VADDR @ virtual .endm diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index 8501bbf2c092..02b160a1ec9b 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S @@ -14,7 +14,7 @@ #include #include - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp mov \rp, #SPEAR_DBG_UART_BASE @ Physical base mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base .endm diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S index 7662f736e42b..cf17d04ec30d 100644 --- a/arch/arm/plat-tcc/include/mach/debug-macro.S +++ b/arch/arm/plat-tcc/include/mach/debug-macro.S @@ -9,7 +9,7 @@ * */ - .macro addruart, rp, rv + .macro addruart, rp, rv, tmp moveq \rp, #0x90000000 @ physical base address movne \rv, #0xF1000000 @ virtual base orr \rp, \rp, #0x00007000 @ UART0 From dd185456efce7f326c058fc12fd0df17bd8466eb Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Wed, 31 Aug 2011 13:57:37 -0400 Subject: [PATCH 08/63] ARM: plat-omap: make OMAP_UART_INFO into a relative offset This is the first step to remove PLAT_PHYS_OFFSET usage from the debug UART code. Signed-off-by: Nicolas Pitre Tested-by: Tony Lindgren Reviewed-by: Kevin Hilman --- arch/arm/mach-omap1/include/mach/debug-macro.S | 8 +++----- arch/arm/mach-omap2/include/mach/debug-macro.S | 9 ++++----- arch/arm/plat-omap/include/plat/serial.h | 6 +++--- arch/arm/plat-omap/include/plat/uncompress.h | 8 +++++++- 4 files changed, 17 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index f944ae8abc97..6a171181986f 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -46,11 +46,9 @@ omap_uart_virt: .word 0x0 bne 99f @ already configured /* Check the debug UART configuration set in uncompress.h */ - mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - ldreq \rp, =OMAP_UART_INFO @ MMU not enabled - ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled - ldr \rp, [\rp, #0] + and \rp, pc, #0xff000000 + ldr \rv, =OMAP_UART_INFO_OFS + ldr \rp, [\rp, \rv] /* Select the UART to use based on the UART1 scratchpad value */ 10: cmp \rp, #0 @ no port configured? diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index fbd23ec81a20..745e2ff3e906 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -49,11 +49,10 @@ omap_uart_lsr: .word 0 bne 99f @ already configured /* Check the debug UART configuration set in uncompress.h */ - mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - ldreq \rp, =OMAP_UART_INFO @ MMU not enabled - ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled - ldr \rp, [\rp, #0] + mov \rp, pc + ldr \rv, =OMAP_UART_INFO_OFS + and \rp, \rp, #0xff000000 + ldr \rp, [\rp, \rv] /* Select the UART to use based on the UART1 scratchpad value */ cmp \rp, #0 @ no port configured? diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h index de3b10c18127..1ab9fd6abe6d 100644 --- a/arch/arm/plat-omap/include/plat/serial.h +++ b/arch/arm/plat-omap/include/plat/serial.h @@ -16,8 +16,8 @@ #include /* - * Memory entry used for the DEBUG_LL UART configuration. See also - * uncompress.h and debug-macro.S. + * Memory entry used for the DEBUG_LL UART configuration, relative to + * start of RAM. See also uncompress.h and debug-macro.S. * * Note that using a memory location for storing the UART configuration * has at least two limitations: @@ -27,7 +27,7 @@ * 2. We assume printascii is called at least once before paging_init, * and addruart has a chance to read OMAP_UART_INFO */ -#define OMAP_UART_INFO (PLAT_PHYS_OFFSET + 0x3ffc) +#define OMAP_UART_INFO_OFS 0x3ffc /* OMAP1 serial ports */ #define OMAP1_UART1_BASE 0xfffb0000 diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index a067484cc4a2..2f472e989ec6 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -36,7 +36,13 @@ int uart_shift; */ static void set_omap_uart_info(unsigned char port) { - *(volatile u32 *)OMAP_UART_INFO = port; + /* + * Get address of some.bss variable and round it down + * a la CONFIG_AUTO_ZRELADDR. + */ + u32 ram_start = (u32)&uart_shift & 0xf8000000; + u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); + *uart_info = port; } static void putc(int c) From 28362d5153757dcb7af9a63978202c1ed1e3cf39 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 1 Sep 2011 19:17:43 -0400 Subject: [PATCH 09/63] ARM: mach-omap1: clean up debug-macro.S This achieves two goals: 1) Get rid of omap_uart_v2p() and omap_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. Signed-off-by: Nicolas Pitre Tested-by: Tony Lindgren Reviewed-by: Kevin Hilman --- .../arm/mach-omap1/include/mach/debug-macro.S | 38 +++++++++---------- 1 file changed, 17 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index 6a171181986f..2b36a281dc84 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S @@ -13,13 +13,8 @@ #include -#include - #include -#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) -#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) - .pushsection .data omap_uart_phys: .word 0x0 omap_uart_virt: .word 0x0 @@ -34,16 +29,16 @@ omap_uart_virt: .word 0x0 .macro addruart, rp, rv, tmp /* Use omap_uart_phys/virt if already configured */ -9: mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled - ldrne \rp, =omap_uart_phys @ MMU enabled - add \rv, \rp, #4 @ omap_uart_virt - ldr \rp, [\rp, #0] - ldr \rv, [\rv, #0] +9: adr \rp, 99f @ get effective addr of 99f + ldr \rv, [\rp] @ get absolute addr of 99f + sub \rv, \rv, \rp @ offset between the two + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys + sub \tmp, \rp, \rv @ make it effective + ldr \rp, [\tmp, #0] @ omap_uart_phys + ldr \rv, [\tmp, #4] @ omap_uart_virt cmp \rp, #0 @ is port configured? cmpne \rv, #0 - bne 99f @ already configured + bne 100f @ already configured /* Check the debug UART configuration set in uncompress.h */ and \rp, pc, #0xff000000 @@ -72,17 +67,18 @@ omap_uart_virt: .word 0x0 /* Store both phys and virt address for the uart */ 98: add \rp, \rp, #0xff000000 @ phys base - mrc p15, 0, \rv, c1, c0 - tst \rv, #1 @ MMU enabled? - ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled - ldrne \rv, =omap_uart_phys @ MMU enabled - str \rp, [\rv, #0] + str \rp, [\tmp, #0] @ omap_uart_phys sub \rp, \rp, #0xff000000 @ phys base add \rp, \rp, #0xfe000000 @ virt base - add \rv, \rv, #4 @ omap_uart_lsr - str \rp, [\rv, #0] + str \rp, [\tmp, #4] @ omap_uart_virt b 9b -99: + + .align +99: .word . + .word omap_uart_phys + .ltorg + +100: .endm .macro senduart,rd,rx From fa808a1ba5f9d40ad47c31f63691b1ded03a46f8 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 1 Sep 2011 00:48:04 -0400 Subject: [PATCH 10/63] ARM: mach-omap2: clean up debug-macro.S This achieves two goals: 1) Get rid of omap_uart_v2p() and omap_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. There is a catch though: the busyuart macro needs to know where the LSR register is which might be at a different offset depending on the hardware. Given that this macro is given only two registers and that one of them must be preserved, the trick is to always pass the LSR register address around, and deduce the base address for the THR register by masking out the LSR offset in senduart instead. Signed-off-by: Nicolas Pitre Tested-by: Tony Lindgren Reviewed-by: Kevin Hilman --- .../arm/mach-omap2/include/mach/debug-macro.S | 70 ++++++++----------- 1 file changed, 31 insertions(+), 39 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 745e2ff3e906..13f98e59cfef 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S @@ -13,15 +13,10 @@ #include -#include - #include #define UART_OFFSET(addr) ((addr) & 0x00ffffff) -#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) -#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) - .pushsection .data omap_uart_phys: .word 0 omap_uart_virt: .word 0 @@ -37,16 +32,16 @@ omap_uart_lsr: .word 0 .macro addruart, rp, rv, tmp /* Use omap_uart_phys/virt if already configured */ -10: mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled - ldrne \rp, =omap_uart_phys @ MMU enabled - add \rv, \rp, #4 @ omap_uart_virt - ldr \rp, [\rp, #0] - ldr \rv, [\rv, #0] +10: adr \rp, 99f @ get effective addr of 99f + ldr \rv, [\rp] @ get absolute addr of 99f + sub \rv, \rv, \rp @ offset between the two + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys + sub \tmp, \rp, \rv @ make it effective + ldr \rp, [\tmp, #0] @ omap_uart_phys + ldr \rv, [\tmp, #4] @ omap_uart_virt cmp \rp, #0 @ is port configured? cmpne \rv, #0 - bne 99f @ already configured + bne 100f @ already configured /* Check the debug UART configuration set in uncompress.h */ mov \rp, pc @@ -105,50 +100,47 @@ omap_uart_lsr: .word 0 b 98f 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) b 98f + 95: ldr \rp, =ZOOM_UART_BASE - mrc p15, 0, \rv, c1, c0 - tst \rv, #1 @ MMU enabled? - ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled - ldrne \rv, =omap_uart_phys @ MMU enabled - str \rp, [\rv, #0] + str \rp, [\tmp, #0] @ omap_uart_phys ldr \rp, =ZOOM_UART_VIRT - add \rv, \rv, #4 @ omap_uart_virt - str \rp, [\rv, #0] + str \rp, [\tmp, #4] @ omap_uart_virt mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) - add \rv, \rv, #4 @ omap_uart_lsr - str \rp, [\rv, #0] + str \rp, [\tmp, #8] @ omap_uart_lsr b 10b /* Store both phys and virt address for the uart */ 98: add \rp, \rp, #0x48000000 @ phys base - mrc p15, 0, \rv, c1, c0 - tst \rv, #1 @ MMU enabled? - ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled - ldrne \rv, =omap_uart_phys @ MMU enabled - str \rp, [\rv, #0] + str \rp, [\tmp, #0] @ omap_uart_phys sub \rp, \rp, #0x48000000 @ phys base add \rp, \rp, #0xfa000000 @ virt base - add \rv, \rv, #4 @ omap_uart_virt - str \rp, [\rv, #0] + str \rp, [\tmp, #4] @ omap_uart_virt mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) - add \rv, \rv, #4 @ omap_uart_lsr - str \rp, [\rv, #0] + str \rp, [\tmp, #8] @ omap_uart_lsr b 10b -99: + + .align +99: .word . + .word omap_uart_phys + .ltorg + +100: /* Pass the UART_LSR reg address */ + ldr \tmp, [\tmp, #8] @ omap_uart_lsr + add \rp, \rp, \tmp + add \rv, \rv, \tmp .endm .macro senduart,rd,rx - strb \rd, [\rx] + orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset + bic \rx, \rx, #0xff @ get base (THR) reg address + strb \rd, [\rx] @ send lower byte of rd + orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) + bic \rd, \rd, #(0xff << 24) @ restore original rd .endm .macro busyuart,rd,rx -1001: mrc p15, 0, \rd, c1, c0 - tst \rd, #1 @ MMU enabled? - ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled - ldrne \rd, =omap_uart_lsr @ MMU enabled - ldr \rd, [\rd, #0] - ldrb \rd, [\rx, \rd] +1001: ldrb \rd, [\rx] @ rx contains UART_LSR address and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) bne 1001b From e020fe34f8fc5cb42c2f518ea120005b4d01923d Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 1 Sep 2011 20:32:21 -0400 Subject: [PATCH 11/63] ARM: mach-davinci: make DAVINCI_UART_INFO into a relative offset This is the first step to remove PLAT_PHYS_OFFSET usage from the debug UART code. Signed-off-by: Nicolas Pitre Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman --- .../mach-davinci/include/mach/debug-macro.S | 21 +++++++++---------- arch/arm/mach-davinci/include/mach/serial.h | 3 ++- .../mach-davinci/include/mach/uncompress.h | 7 ++++++- 3 files changed, 18 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index 3cf4c1b4f33a..45fff2c61f48 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S @@ -50,21 +50,20 @@ davinci_uart_virt: .word 0 mrc p15, 0, \rp, c1, c0 tst \rp, #1 @ MMU enabled? - /* Copy uart phys address from decompressor uart info */ + and \rp, pc, #0xff000000 + ldr \rv, =DAVINCI_UART_INFO_OFS + add \rp, \rp, \rv + ldreq \rv, =davinci_uart_v2p(davinci_uart_phys) ldrne \rv, =davinci_uart_phys - ldreq \rp, =DAVINCI_UART_INFO - ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) - ldr \rp, [\rp, #0] - str \rp, [\rv] + + /* Copy uart phys address from decompressor uart info */ + ldr \tmp, [\rp, #0] + str \tmp, [\rv, #0] /* Copy uart virt address from decompressor uart info */ - ldreq \rv, =davinci_uart_v2p(davinci_uart_virt) - ldrne \rv, =davinci_uart_virt - ldreq \rp, =DAVINCI_UART_INFO - ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) - ldr \rp, [\rp, #4] - str \rp, [\rv] + ldr \tmp, [\rp, #4] + str \tmp, [\rv, #4] b 10b 99: diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index c9e6ce185a66..e347d88fef91 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h @@ -21,8 +21,9 @@ * macros in debug-macro.S. * * This area sits just below the page tables (see arch/arm/kernel/head.S). + * We define it as a relative offset from start of usable RAM. */ -#define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8) +#define DAVINCI_UART_INFO_OFS 0x3ff8 #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h index 78d80683cdc2..9dc7cf9664fe 100644 --- a/arch/arm/mach-davinci/include/mach/uncompress.h +++ b/arch/arm/mach-davinci/include/mach/uncompress.h @@ -43,7 +43,12 @@ static inline void flush(void) static inline void set_uart_info(u32 phys, void * __iomem virt) { - u32 *uart_info = (u32 *)(DAVINCI_UART_INFO); + /* + * Get address of some.bss variable and round it down + * a la CONFIG_AUTO_ZRELADDR. + */ + u32 ram_start = (u32)&uart & 0xf8000000; + u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS); uart = (u32 *)phys; uart_info[0] = phys; From 67f462b29310814a8de29d35b422a9ed41d5f39a Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 1 Sep 2011 20:50:14 -0400 Subject: [PATCH 12/63] ARM: mach-davinci: clean up debug-macro.S This achieves two goals: 1) Get rid of davinci_uart_v2p() and davinci_uart_p2v() which were the last users of PLAT_PHYS_OFFSET. 2) Remove the probing of the M bit in the CP15 control reg and make the access to the .data variables completely position independent. Signed-off-by: Nicolas Pitre Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman --- .../mach-davinci/include/mach/debug-macro.S | 43 ++++++++----------- 1 file changed, 19 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index 45fff2c61f48..cf94552d5274 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S @@ -18,15 +18,10 @@ #include -#include - #include #define UART_SHIFT 2 -#define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) -#define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) - .pushsection .data davinci_uart_phys: .word 0 davinci_uart_virt: .word 0 @@ -35,38 +30,38 @@ davinci_uart_virt: .word 0 .macro addruart, rp, rv, tmp /* Use davinci_uart_phys/virt if already configured */ -10: mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - ldreq \rp, =davinci_uart_v2p(davinci_uart_phys) - ldrne \rp, =davinci_uart_phys - add \rv, \rp, #4 @ davinci_uart_virt - ldr \rp, [\rp, #0] - ldr \rv, [\rv, #0] +10: adr \rp, 99f @ get effective addr of 99f + ldr \rv, [\rp] @ get absolute addr of 99f + sub \rv, \rv, \rp @ offset between the two + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys + sub \tmp, \rp, \rv @ make it effective + ldr \rp, [\tmp, #0] @ davinci_uart_phys + ldr \rv, [\tmp, #4] @ davinci_uart_virt cmp \rp, #0 @ is port configured? cmpne \rv, #0 - bne 99f @ already configured + bne 100f @ already configured /* Check the debug UART address set in uncompress.h */ - mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - and \rp, pc, #0xff000000 ldr \rv, =DAVINCI_UART_INFO_OFS add \rp, \rp, \rv - ldreq \rv, =davinci_uart_v2p(davinci_uart_phys) - ldrne \rv, =davinci_uart_phys - /* Copy uart phys address from decompressor uart info */ - ldr \tmp, [\rp, #0] - str \tmp, [\rv, #0] + ldr \rv, [\rp, #0] + str \rv, [\tmp, #0] /* Copy uart virt address from decompressor uart info */ - ldr \tmp, [\rp, #4] - str \tmp, [\rv, #4] + ldr \rv, [\rp, #4] + str \rv, [\tmp, #4] b 10b -99: + + .align +99: .word . + .word davinci_uart_phys + .ltorg + +100: .endm .macro senduart,rd,rx From 1b9f95f8ade9efc2bd49f0e7b9dc61a038ac3eef Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:51 -0400 Subject: [PATCH 13/63] ARM: prepare for removal of a bunch of files When the CONFIG_NO_MACH_MEMORY_H symbol is selected by a particular machine class, the machine specific memory.h include file is no longer used and can be removed. In that case the equivalent information can be obtained dynamically at runtime by enabling CONFIG_ARM_PATCH_PHYS_VIRT or by specifying the physical memory address at kernel configuration time. If/when all instances of mach/memory.h are removed then this symbol could be removed. Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 11 +++++++++++ arch/arm/include/asm/memory.h | 9 ++++++++- arch/arm/kernel/head.S | 2 +- 3 files changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 272eadc7a12c..1ecb09bca27e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -211,6 +211,17 @@ config ARM_PATCH_PHYS_VIRT this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. +config NO_MACH_MEMORY_H + bool + help + Select this when mach/memory.h is removed. + +config PHYS_OFFSET + hex "Physical address of main memory" + depends on !ARM_PATCH_PHYS_VIRT && NO_MACH_MEMORY_H + help + Please provide the physical address corresponding to the + location of main memory in your system. source "init/Kconfig" diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 90bca427e367..046c915694cd 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -16,9 +16,12 @@ #include #include #include -#include #include +#ifndef CONFIG_NO_MACH_MEMORY_H +#include +#endif + /* * Allow for constants defined here to be used from assembly code * by prepending the UL suffix only with actual C code compilation. @@ -184,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x) #endif #ifndef PHYS_OFFSET +#ifdef PLAT_PHYS_OFFSET #define PHYS_OFFSET PLAT_PHYS_OFFSET +#else +#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) +#endif #endif /* diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 7408fd506656..673c806cc106 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -95,7 +95,7 @@ ENTRY(stext) sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) add r8, r8, r4 @ PHYS_OFFSET #else - ldr r8, =PLAT_PHYS_OFFSET + ldr r8, =PHYS_OFFSET @ always constant in this case #endif /* From e33e51070cbe8979a9aac43a6d5e773eaa44f9b1 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:51 -0400 Subject: [PATCH 14/63] ARM: mach-dove: remove include/mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-dove/include/mach/memory.h | 10 ---------- 2 files changed, 1 insertion(+), 10 deletions(-) delete mode 100644 arch/arm/mach-dove/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1ecb09bca27e..646cc4becb69 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -503,6 +503,7 @@ config ARCH_DOVE select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION + select NO_MACH_MEMORY_H help Support for the Marvell Dove SoC 88AP510 diff --git a/arch/arm/mach-dove/include/mach/memory.h b/arch/arm/mach-dove/include/mach/memory.h deleted file mode 100644 index bbc93fee6c75..000000000000 --- a/arch/arm/mach-dove/include/mach/memory.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-dove/include/mach/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From 748e91cb3c6040a73b63afc348fe3d6042bdeef3 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:51 -0400 Subject: [PATCH 15/63] ARM: mach-kirkwood: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-kirkwood/include/mach/memory.h | 10 ---------- 2 files changed, 1 insertion(+), 10 deletions(-) delete mode 100644 arch/arm/mach-kirkwood/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 646cc4becb69..b2235184e7b6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -514,6 +514,7 @@ config ARCH_KIRKWOOD select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION + select NO_MACH_MEMORY_H help Support for the following Marvell Kirkwood series SoCs: 88F6180, 88F6192 and 88F6281. diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h deleted file mode 100644 index 4600b44e3ad3..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/memory.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-kirkwood/include/mach/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From 8fce8b2080bf49de9e5d96161932edcbffad11cf Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:52 -0400 Subject: [PATCH 16/63] ARM: mach-orion5x: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-orion5x/include/mach/memory.h | 12 ------------ 2 files changed, 1 insertion(+), 12 deletions(-) delete mode 100644 arch/arm/mach-orion5x/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b2235184e7b6..465bdb25ac13 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -552,6 +552,7 @@ config ARCH_ORION5X select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION + select NO_MACH_MEMORY_H help Support for the following Marvell Orion 5x series SoCs: Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h deleted file mode 100644 index 6769917882fe..000000000000 --- a/arch/arm/mach-orion5x/include/mach/memory.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * arch/arm/mach-orion5x/include/mach/memory.h - * - * Marvell Orion memory definitions - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From ee581ae83f6e7878ff937bc0a5724173f1960130 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:52 -0400 Subject: [PATCH 17/63] ARM: OMAP: move OMAP1 memory config from plat/memory.h to its mach/memory.h Signed-off-by: Nicolas Pitre Acked-by: Tony Lindgren --- arch/arm/mach-omap1/include/mach/memory.h | 53 ++++++++++++++++++++++- arch/arm/plat-omap/include/plat/memory.h | 45 +------------------ 2 files changed, 53 insertions(+), 45 deletions(-) diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index e9b600c113ef..c6337645ba8a 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h @@ -2,4 +2,55 @@ * arch/arm/mach-omap1/include/mach/memory.h */ -#include +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PLAT_PHYS_OFFSET UL(0x10000000) + +/* + * Bus address is physical address, except for OMAP-1510 Local Bus. + * OMAP-1510 bus address is translated into a Local Bus address if the + * OMAP bus type is lbus. We do the address translation based on the + * device overriding the defaults used in the dma-mapping API. + * Note that the is_lbus_device() test is not very efficient on 1510 + * because of the strncmp(). + */ +#ifdef CONFIG_ARCH_OMAP15XX + +/* + * OMAP-1510 Local Bus address offset + */ +#define OMAP1510_LB_OFFSET UL(0x30000000) + +#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) +#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) +#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) + +#define __arch_pfn_to_dma(dev, pfn) \ + ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ + if (is_lbus_device(dev)) \ + __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ + __dma; }) + +#define __arch_dma_to_pfn(dev, addr) \ + ({ dma_addr_t __dma = addr; \ + if (is_lbus_device(dev)) \ + __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ + __phys_to_pfn(__dma); \ + }) + +#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ + lbus_to_virt(addr) : \ + __phys_to_virt(addr)); }) + +#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ + (dma_addr_t) (is_lbus_device(dev) ? \ + virt_to_lbus(__addr) : \ + __virt_to_phys(__addr)); }) + +#endif /* CONFIG_ARCH_OMAP15XX */ + +#endif diff --git a/arch/arm/plat-omap/include/plat/memory.h b/arch/arm/plat-omap/include/plat/memory.h index 7f9df6f1e113..5b1a86d0a4d0 100644 --- a/arch/arm/plat-omap/include/plat/memory.h +++ b/arch/arm/plat-omap/include/plat/memory.h @@ -37,53 +37,10 @@ * Physical DRAM offset. */ #if defined(CONFIG_ARCH_OMAP1) -#define PLAT_PHYS_OFFSET UL(0x10000000) +#error "OMAP1 should not be including this" #else #define PLAT_PHYS_OFFSET UL(0x80000000) #endif -/* - * Bus address is physical address, except for OMAP-1510 Local Bus. - * OMAP-1510 bus address is translated into a Local Bus address if the - * OMAP bus type is lbus. We do the address translation based on the - * device overriding the defaults used in the dma-mapping API. - * Note that the is_lbus_device() test is not very efficient on 1510 - * because of the strncmp(). - */ -#ifdef CONFIG_ARCH_OMAP15XX - -/* - * OMAP-1510 Local Bus address offset - */ -#define OMAP1510_LB_OFFSET UL(0x30000000) - -#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) -#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) -#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) - -#define __arch_pfn_to_dma(dev, pfn) \ - ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ - if (is_lbus_device(dev)) \ - __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ - __dma; }) - -#define __arch_dma_to_pfn(dev, addr) \ - ({ dma_addr_t __dma = addr; \ - if (is_lbus_device(dev)) \ - __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ - __phys_to_pfn(__dma); \ - }) - -#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ - lbus_to_virt(addr) : \ - __phys_to_virt(addr)); }) - -#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ - (dma_addr_t) (is_lbus_device(dev) ? \ - virt_to_lbus(__addr) : \ - __virt_to_phys(__addr)); }) - -#endif /* CONFIG_ARCH_OMAP15XX */ - #endif From 7743a087640cbb0b5d81ee8a73b7ffed468f7bb6 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:52 -0400 Subject: [PATCH 18/63] ARM: mach-omap2: remove mach/memory.h Signed-off-by: Nicolas Pitre Acked-by: Tony Lindgren --- arch/arm/mach-omap2/include/mach/memory.h | 5 --- arch/arm/plat-omap/Kconfig | 1 + arch/arm/plat-omap/include/plat/memory.h | 46 ----------------------- 3 files changed, 1 insertion(+), 51 deletions(-) delete mode 100644 arch/arm/mach-omap2/include/mach/memory.h delete mode 100644 arch/arm/plat-omap/include/plat/memory.h diff --git a/arch/arm/mach-omap2/include/mach/memory.h b/arch/arm/mach-omap2/include/mach/memory.h deleted file mode 100644 index ca6d32a917dd..000000000000 --- a/arch/arm/mach-omap2/include/mach/memory.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * arch/arm/mach-omap2/include/mach/memory.h - */ - -#include diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index bb8f4a6b3e37..e00fe764045a 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -22,6 +22,7 @@ config ARCH_OMAP2PLUS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP select OMAP_DM_TIMER + select NO_MACH_MEMORY_H help "Systems based on OMAP2, OMAP3 or OMAP4" diff --git a/arch/arm/plat-omap/include/plat/memory.h b/arch/arm/plat-omap/include/plat/memory.h deleted file mode 100644 index 5b1a86d0a4d0..000000000000 --- a/arch/arm/plat-omap/include/plat/memory.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/memory.h - * - * Memory map for OMAP-1510 and 1610 - * - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * This file was derived from arch/arm/mach-intergrator/include/mach/memory.h - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#if defined(CONFIG_ARCH_OMAP1) -#error "OMAP1 should not be including this" -#else -#define PLAT_PHYS_OFFSET UL(0x80000000) -#endif - -#endif - From 8cfc1ef96a873d35d2fb86ac8ccf34d388a48e55 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:52 -0400 Subject: [PATCH 19/63] ARM: mach-iop33x: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-iop33x/include/mach/memory.h | 13 ------------- 2 files changed, 1 insertion(+), 13 deletions(-) delete mode 100644 arch/arm/mach-iop33x/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 465bdb25ac13..01343438e91b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -462,6 +462,7 @@ config ARCH_IOP33X select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB + select NO_MACH_MEMORY_H help Support for Intel's IOP33X (XScale) family of processors. diff --git a/arch/arm/mach-iop33x/include/mach/memory.h b/arch/arm/mach-iop33x/include/mach/memory.h deleted file mode 100644 index 8e1daf7006b6..000000000000 --- a/arch/arm/mach-iop33x/include/mach/memory.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-iop33x/include/mach/memory.h - */ - -#ifndef __MEMORY_H -#define __MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From 31d9d9b6d83030f748d013e61502fa5477e2ac0e Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 23 Sep 2011 17:03:06 +0100 Subject: [PATCH 20/63] genirq: Add support for per-cpu dev_id interrupts The ARM GIC interrupt controller offers per CPU interrupts (PPIs), which are usually used to connect local timers to each core. Each CPU has its own private interface to the GIC, and only sees the PPIs that are directly connect to it. While these timers are separate devices and have a separate interrupt line to a core, they all use the same IRQ number. For these devices, request_irq() is not the right API as it assumes that an IRQ number is visible by a number of CPUs (through the affinity setting), but makes it very awkward to express that an IRQ number can be handled by all CPUs, and yet be a different interrupt line on each CPU, requiring a different dev_id cookie to be passed back to the handler. The *_percpu_irq() functions is designed to overcome these limitations, by providing a per-cpu dev_id vector: int request_percpu_irq(unsigned int irq, irq_handler_t handler, const char *devname, void __percpu *percpu_dev_id); void free_percpu_irq(unsigned int, void __percpu *); int setup_percpu_irq(unsigned int irq, struct irqaction *new); void remove_percpu_irq(unsigned int irq, struct irqaction *act); void enable_percpu_irq(unsigned int irq); void disable_percpu_irq(unsigned int irq); The API has a number of limitations: - no interrupt sharing - no threading - common handler across all the CPUs Once the interrupt is requested using setup_percpu_irq() or request_percpu_irq(), it must be enabled by each core that wishes its local interrupt to be delivered. Based on an initial patch by Thomas Gleixner. Signed-off-by: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner --- include/linux/interrupt.h | 38 ++++--- include/linux/irq.h | 16 ++- include/linux/irqdesc.h | 1 + kernel/irq/chip.c | 64 ++++++++++-- kernel/irq/internals.h | 19 +++- kernel/irq/irqdesc.c | 32 +++++- kernel/irq/manage.c | 202 ++++++++++++++++++++++++++++++++++++-- kernel/irq/settings.h | 7 ++ 8 files changed, 345 insertions(+), 34 deletions(-) diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index a103732b7588..1cdfd09c8abc 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -95,6 +95,7 @@ typedef irqreturn_t (*irq_handler_t)(int, void *); * @flags: flags (see IRQF_* above) * @name: name of the device * @dev_id: cookie to identify the device + * @percpu_dev_id: cookie to identify the device * @next: pointer to the next irqaction for shared interrupts * @irq: interrupt number * @dir: pointer to the proc/irq/NN/name entry @@ -104,17 +105,18 @@ typedef irqreturn_t (*irq_handler_t)(int, void *); * @thread_mask: bitmask for keeping track of @thread activity */ struct irqaction { - irq_handler_t handler; - unsigned long flags; - void *dev_id; - struct irqaction *next; - int irq; - irq_handler_t thread_fn; - struct task_struct *thread; - unsigned long thread_flags; - unsigned long thread_mask; - const char *name; - struct proc_dir_entry *dir; + irq_handler_t handler; + unsigned long flags; + void *dev_id; + void __percpu *percpu_dev_id; + struct irqaction *next; + int irq; + irq_handler_t thread_fn; + struct task_struct *thread; + unsigned long thread_flags; + unsigned long thread_mask; + const char *name; + struct proc_dir_entry *dir; } ____cacheline_internodealigned_in_smp; extern irqreturn_t no_action(int cpl, void *dev_id); @@ -136,6 +138,10 @@ extern int __must_check request_any_context_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *name, void *dev_id); +extern int __must_check +request_percpu_irq(unsigned int irq, irq_handler_t handler, + const char *devname, void __percpu *percpu_dev_id); + extern void exit_irq_thread(void); #else @@ -164,10 +170,18 @@ request_any_context_irq(unsigned int irq, irq_handler_t handler, return request_irq(irq, handler, flags, name, dev_id); } +static inline int __must_check +request_percpu_irq(unsigned int irq, irq_handler_t handler, + const char *devname, void __percpu *percpu_dev_id) +{ + return request_irq(irq, handler, 0, devname, percpu_dev_id); +} + static inline void exit_irq_thread(void) { } #endif extern void free_irq(unsigned int, void *); +extern void free_percpu_irq(unsigned int, void __percpu *); struct device; @@ -207,7 +221,9 @@ extern void devm_free_irq(struct device *dev, unsigned int irq, void *dev_id); extern void disable_irq_nosync(unsigned int irq); extern void disable_irq(unsigned int irq); +extern void disable_percpu_irq(unsigned int irq); extern void enable_irq(unsigned int irq); +extern void enable_percpu_irq(unsigned int irq); /* The following three functions are for the core kernel use only. */ #ifdef CONFIG_GENERIC_HARDIRQS diff --git a/include/linux/irq.h b/include/linux/irq.h index 73e31abeba1c..59e49c80cc2c 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -66,6 +66,7 @@ typedef void (*irq_preflow_handler_t)(struct irq_data *data); * IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set) * IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context * IRQ_NESTED_TRHEAD - Interrupt nests into another thread + * IRQ_PER_CPU_DEVID - Dev_id is a per-cpu variable */ enum { IRQ_TYPE_NONE = 0x00000000, @@ -88,12 +89,13 @@ enum { IRQ_MOVE_PCNTXT = (1 << 14), IRQ_NESTED_THREAD = (1 << 15), IRQ_NOTHREAD = (1 << 16), + IRQ_PER_CPU_DEVID = (1 << 17), }; #define IRQF_MODIFY_MASK \ (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \ IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \ - IRQ_PER_CPU | IRQ_NESTED_THREAD) + IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID) #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) @@ -367,6 +369,8 @@ enum { struct irqaction; extern int setup_irq(unsigned int irq, struct irqaction *new); extern void remove_irq(unsigned int irq, struct irqaction *act); +extern int setup_percpu_irq(unsigned int irq, struct irqaction *new); +extern void remove_percpu_irq(unsigned int irq, struct irqaction *act); extern void irq_cpu_online(void); extern void irq_cpu_offline(void); @@ -394,6 +398,7 @@ extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc); extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); +extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc); extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); extern void handle_nested_irq(unsigned int irq); @@ -422,6 +427,8 @@ static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *c irq_set_chip_and_handler_name(irq, chip, handle, NULL); } +extern int irq_set_percpu_devid(unsigned int irq); + extern void __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, const char *name); @@ -483,6 +490,13 @@ static inline void irq_set_nested_thread(unsigned int irq, bool nest) irq_clear_status_flags(irq, IRQ_NESTED_THREAD); } +static inline void irq_set_percpu_devid_flags(unsigned int irq) +{ + irq_set_status_flags(irq, + IRQ_NOAUTOEN | IRQ_PER_CPU | IRQ_NOTHREAD | + IRQ_NOPROBE | IRQ_PER_CPU_DEVID); +} + /* Handle dynamic irq creation and destruction */ extern unsigned int create_irq_nr(unsigned int irq_want, int node); extern int create_irq(void); diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h index 150134ac709a..6b69c2c9dff1 100644 --- a/include/linux/irqdesc.h +++ b/include/linux/irqdesc.h @@ -53,6 +53,7 @@ struct irq_desc { unsigned long last_unhandled; /* Aging timer for unhandled count */ unsigned int irqs_unhandled; raw_spinlock_t lock; + struct cpumask *percpu_enabled; #ifdef CONFIG_SMP const struct cpumask *affinity_hint; struct irq_affinity_notify *affinity_notify; diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index dc5114b4c16c..f7c543a801d9 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -26,7 +26,7 @@ int irq_set_chip(unsigned int irq, struct irq_chip *chip) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); if (!desc) return -EINVAL; @@ -54,7 +54,7 @@ EXPORT_SYMBOL(irq_set_chip); int irq_set_irq_type(unsigned int irq, unsigned int type) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); + struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); int ret = 0; if (!desc) @@ -78,7 +78,7 @@ EXPORT_SYMBOL(irq_set_irq_type); int irq_set_handler_data(unsigned int irq, void *data) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); if (!desc) return -EINVAL; @@ -98,7 +98,7 @@ EXPORT_SYMBOL(irq_set_handler_data); int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); if (!desc) return -EINVAL; @@ -119,7 +119,7 @@ int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry) int irq_set_chip_data(unsigned int irq, void *data) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); if (!desc) return -EINVAL; @@ -204,6 +204,24 @@ void irq_disable(struct irq_desc *desc) } } +void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu) +{ + if (desc->irq_data.chip->irq_enable) + desc->irq_data.chip->irq_enable(&desc->irq_data); + else + desc->irq_data.chip->irq_unmask(&desc->irq_data); + cpumask_set_cpu(cpu, desc->percpu_enabled); +} + +void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu) +{ + if (desc->irq_data.chip->irq_disable) + desc->irq_data.chip->irq_disable(&desc->irq_data); + else + desc->irq_data.chip->irq_mask(&desc->irq_data); + cpumask_clear_cpu(cpu, desc->percpu_enabled); +} + static inline void mask_ack_irq(struct irq_desc *desc) { if (desc->irq_data.chip->irq_mask_ack) @@ -544,12 +562,44 @@ handle_percpu_irq(unsigned int irq, struct irq_desc *desc) chip->irq_eoi(&desc->irq_data); } +/** + * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids + * @irq: the interrupt number + * @desc: the interrupt description structure for this irq + * + * Per CPU interrupts on SMP machines without locking requirements. Same as + * handle_percpu_irq() above but with the following extras: + * + * action->percpu_dev_id is a pointer to percpu variables which + * contain the real device id for the cpu on which this handler is + * called + */ +void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc) +{ + struct irq_chip *chip = irq_desc_get_chip(desc); + struct irqaction *action = desc->action; + void *dev_id = __this_cpu_ptr(action->percpu_dev_id); + irqreturn_t res; + + kstat_incr_irqs_this_cpu(irq, desc); + + if (chip->irq_ack) + chip->irq_ack(&desc->irq_data); + + trace_irq_handler_entry(irq, action); + res = action->handler(irq, dev_id); + trace_irq_handler_exit(irq, action, res); + + if (chip->irq_eoi) + chip->irq_eoi(&desc->irq_data); +} + void __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, const char *name) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); + struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0); if (!desc) return; @@ -593,7 +643,7 @@ irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); if (!desc) return; diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 6546431447d7..a73dd6c7372d 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -71,6 +71,8 @@ extern int irq_startup(struct irq_desc *desc); extern void irq_shutdown(struct irq_desc *desc); extern void irq_enable(struct irq_desc *desc); extern void irq_disable(struct irq_desc *desc); +extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); +extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); extern void mask_irq(struct irq_desc *desc); extern void unmask_irq(struct irq_desc *desc); @@ -114,14 +116,21 @@ static inline void chip_bus_sync_unlock(struct irq_desc *desc) desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); } +#define _IRQ_DESC_CHECK (1 << 0) +#define _IRQ_DESC_PERCPU (1 << 1) + +#define IRQ_GET_DESC_CHECK_GLOBAL (_IRQ_DESC_CHECK) +#define IRQ_GET_DESC_CHECK_PERCPU (_IRQ_DESC_CHECK | _IRQ_DESC_PERCPU) + struct irq_desc * -__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus); +__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, + unsigned int check); void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus); static inline struct irq_desc * -irq_get_desc_buslock(unsigned int irq, unsigned long *flags) +irq_get_desc_buslock(unsigned int irq, unsigned long *flags, unsigned int check) { - return __irq_get_desc_lock(irq, flags, true); + return __irq_get_desc_lock(irq, flags, true, check); } static inline void @@ -131,9 +140,9 @@ irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags) } static inline struct irq_desc * -irq_get_desc_lock(unsigned int irq, unsigned long *flags) +irq_get_desc_lock(unsigned int irq, unsigned long *flags, unsigned int check) { - return __irq_get_desc_lock(irq, flags, false); + return __irq_get_desc_lock(irq, flags, false, check); } static inline void diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index 039b889ea053..1550e8447a16 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -424,11 +424,22 @@ unsigned int irq_get_next_irq(unsigned int offset) } struct irq_desc * -__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus) +__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, + unsigned int check) { struct irq_desc *desc = irq_to_desc(irq); if (desc) { + if (check & _IRQ_DESC_CHECK) { + if ((check & _IRQ_DESC_PERCPU) && + !irq_settings_is_per_cpu_devid(desc)) + return NULL; + + if (!(check & _IRQ_DESC_PERCPU) && + irq_settings_is_per_cpu_devid(desc)) + return NULL; + } + if (bus) chip_bus_lock(desc); raw_spin_lock_irqsave(&desc->lock, *flags); @@ -443,6 +454,25 @@ void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus) chip_bus_sync_unlock(desc); } +int irq_set_percpu_devid(unsigned int irq) +{ + struct irq_desc *desc = irq_to_desc(irq); + + if (!desc) + return -EINVAL; + + if (desc->percpu_enabled) + return -EINVAL; + + desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL); + + if (!desc->percpu_enabled) + return -ENOMEM; + + irq_set_percpu_devid_flags(irq); + return 0; +} + /** * dynamic_irq_cleanup - cleanup a dynamically allocated irq * @irq: irq number to initialize diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 7e1a3ed1e61a..7b4b156d065c 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -195,7 +195,7 @@ int irq_set_affinity(unsigned int irq, const struct cpumask *mask) int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); if (!desc) return -EINVAL; @@ -356,7 +356,7 @@ void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) static int __disable_irq_nosync(unsigned int irq) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); + struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); if (!desc) return -EINVAL; @@ -448,7 +448,7 @@ void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) void enable_irq(unsigned int irq) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); + struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); if (!desc) return; @@ -491,7 +491,7 @@ static int set_irq_wake_real(unsigned int irq, unsigned int on) int irq_set_irq_wake(unsigned int irq, unsigned int on) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); + struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); int ret = 0; if (!desc) @@ -532,7 +532,7 @@ EXPORT_SYMBOL(irq_set_irq_wake); int can_request_irq(unsigned int irq, unsigned long irqflags) { unsigned long flags; - struct irq_desc *desc = irq_get_desc_lock(irq, &flags); + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); int canrequest = 0; if (!desc) @@ -1121,6 +1121,8 @@ int setup_irq(unsigned int irq, struct irqaction *act) int retval; struct irq_desc *desc = irq_to_desc(irq); + if (WARN_ON(irq_settings_is_per_cpu_devid(desc))) + return -EINVAL; chip_bus_lock(desc); retval = __setup_irq(irq, desc, act); chip_bus_sync_unlock(desc); @@ -1129,7 +1131,7 @@ int setup_irq(unsigned int irq, struct irqaction *act) } EXPORT_SYMBOL_GPL(setup_irq); - /* +/* * Internal function to unregister an irqaction - used to free * regular and special interrupts that are part of the architecture. */ @@ -1227,7 +1229,10 @@ static struct irqaction *__free_irq(unsigned int irq, void *dev_id) */ void remove_irq(unsigned int irq, struct irqaction *act) { - __free_irq(irq, act->dev_id); + struct irq_desc *desc = irq_to_desc(irq); + + if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc))) + __free_irq(irq, act->dev_id); } EXPORT_SYMBOL_GPL(remove_irq); @@ -1249,7 +1254,7 @@ void free_irq(unsigned int irq, void *dev_id) { struct irq_desc *desc = irq_to_desc(irq); - if (!desc) + if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) return; #ifdef CONFIG_SMP @@ -1327,7 +1332,8 @@ int request_threaded_irq(unsigned int irq, irq_handler_t handler, if (!desc) return -EINVAL; - if (!irq_settings_can_request(desc)) + if (!irq_settings_can_request(desc) || + WARN_ON(irq_settings_is_per_cpu_devid(desc))) return -EINVAL; if (!handler) { @@ -1412,3 +1418,181 @@ int request_any_context_irq(unsigned int irq, irq_handler_t handler, return !ret ? IRQC_IS_HARDIRQ : ret; } EXPORT_SYMBOL_GPL(request_any_context_irq); + +void enable_percpu_irq(unsigned int irq) +{ + unsigned int cpu = smp_processor_id(); + unsigned long flags; + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); + + if (!desc) + return; + + irq_percpu_enable(desc, cpu); + irq_put_desc_unlock(desc, flags); +} + +void disable_percpu_irq(unsigned int irq) +{ + unsigned int cpu = smp_processor_id(); + unsigned long flags; + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); + + if (!desc) + return; + + irq_percpu_disable(desc, cpu); + irq_put_desc_unlock(desc, flags); +} + +/* + * Internal function to unregister a percpu irqaction. + */ +static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id) +{ + struct irq_desc *desc = irq_to_desc(irq); + struct irqaction *action; + unsigned long flags; + + WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); + + if (!desc) + return NULL; + + raw_spin_lock_irqsave(&desc->lock, flags); + + action = desc->action; + if (!action || action->percpu_dev_id != dev_id) { + WARN(1, "Trying to free already-free IRQ %d\n", irq); + goto bad; + } + + if (!cpumask_empty(desc->percpu_enabled)) { + WARN(1, "percpu IRQ %d still enabled on CPU%d!\n", + irq, cpumask_first(desc->percpu_enabled)); + goto bad; + } + + /* Found it - now remove it from the list of entries: */ + desc->action = NULL; + + raw_spin_unlock_irqrestore(&desc->lock, flags); + + unregister_handler_proc(irq, action); + + module_put(desc->owner); + return action; + +bad: + raw_spin_unlock_irqrestore(&desc->lock, flags); + return NULL; +} + +/** + * remove_percpu_irq - free a per-cpu interrupt + * @irq: Interrupt line to free + * @act: irqaction for the interrupt + * + * Used to remove interrupts statically setup by the early boot process. + */ +void remove_percpu_irq(unsigned int irq, struct irqaction *act) +{ + struct irq_desc *desc = irq_to_desc(irq); + + if (desc && irq_settings_is_per_cpu_devid(desc)) + __free_percpu_irq(irq, act->percpu_dev_id); +} + +/** + * free_percpu_irq - free an interrupt allocated with request_percpu_irq + * @irq: Interrupt line to free + * @dev_id: Device identity to free + * + * Remove a percpu interrupt handler. The handler is removed, but + * the interrupt line is not disabled. This must be done on each + * CPU before calling this function. The function does not return + * until any executing interrupts for this IRQ have completed. + * + * This function must not be called from interrupt context. + */ +void free_percpu_irq(unsigned int irq, void __percpu *dev_id) +{ + struct irq_desc *desc = irq_to_desc(irq); + + if (!desc || !irq_settings_is_per_cpu_devid(desc)) + return; + + chip_bus_lock(desc); + kfree(__free_percpu_irq(irq, dev_id)); + chip_bus_sync_unlock(desc); +} + +/** + * setup_percpu_irq - setup a per-cpu interrupt + * @irq: Interrupt line to setup + * @act: irqaction for the interrupt + * + * Used to statically setup per-cpu interrupts in the early boot process. + */ +int setup_percpu_irq(unsigned int irq, struct irqaction *act) +{ + struct irq_desc *desc = irq_to_desc(irq); + int retval; + + if (!desc || !irq_settings_is_per_cpu_devid(desc)) + return -EINVAL; + chip_bus_lock(desc); + retval = __setup_irq(irq, desc, act); + chip_bus_sync_unlock(desc); + + return retval; +} + +/** + * request_percpu_irq - allocate a percpu interrupt line + * @irq: Interrupt line to allocate + * @handler: Function to be called when the IRQ occurs. + * @devname: An ascii name for the claiming device + * @dev_id: A percpu cookie passed back to the handler function + * + * This call allocates interrupt resources, but doesn't + * automatically enable the interrupt. It has to be done on each + * CPU using enable_percpu_irq(). + * + * Dev_id must be globally unique. It is a per-cpu variable, and + * the handler gets called with the interrupted CPU's instance of + * that variable. + */ +int request_percpu_irq(unsigned int irq, irq_handler_t handler, + const char *devname, void __percpu *dev_id) +{ + struct irqaction *action; + struct irq_desc *desc; + int retval; + + if (!dev_id) + return -EINVAL; + + desc = irq_to_desc(irq); + if (!desc || !irq_settings_can_request(desc) || + !irq_settings_is_per_cpu_devid(desc)) + return -EINVAL; + + action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); + if (!action) + return -ENOMEM; + + action->handler = handler; + action->flags = IRQF_PERCPU; + action->name = devname; + action->percpu_dev_id = dev_id; + + chip_bus_lock(desc); + retval = __setup_irq(irq, desc, action); + chip_bus_sync_unlock(desc); + + if (retval) + kfree(action); + + return retval; +} diff --git a/kernel/irq/settings.h b/kernel/irq/settings.h index f1667833d444..1162f1030f18 100644 --- a/kernel/irq/settings.h +++ b/kernel/irq/settings.h @@ -13,6 +13,7 @@ enum { _IRQ_MOVE_PCNTXT = IRQ_MOVE_PCNTXT, _IRQ_NO_BALANCING = IRQ_NO_BALANCING, _IRQ_NESTED_THREAD = IRQ_NESTED_THREAD, + _IRQ_PER_CPU_DEVID = IRQ_PER_CPU_DEVID, _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK, }; @@ -24,6 +25,7 @@ enum { #define IRQ_NOTHREAD GOT_YOU_MORON #define IRQ_NOAUTOEN GOT_YOU_MORON #define IRQ_NESTED_THREAD GOT_YOU_MORON +#define IRQ_PER_CPU_DEVID GOT_YOU_MORON #undef IRQF_MODIFY_MASK #define IRQF_MODIFY_MASK GOT_YOU_MORON @@ -39,6 +41,11 @@ static inline bool irq_settings_is_per_cpu(struct irq_desc *desc) return desc->status_use_accessors & _IRQ_PER_CPU; } +static inline bool irq_settings_is_per_cpu_devid(struct irq_desc *desc) +{ + return desc->status_use_accessors & _IRQ_PER_CPU_DEVID; +} + static inline void irq_settings_set_per_cpu(struct irq_desc *desc) { desc->status_use_accessors |= _IRQ_PER_CPU; From 1e7c5fd29487ee88cb3abac945bafa60ae026146 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 30 Sep 2011 10:48:47 +0100 Subject: [PATCH 21/63] genirq: percpu: allow interrupt type to be set at enable time As request_percpu_irq() doesn't allow for a percpu interrupt to have its type configured (it is generally impossible to configure it on all CPUs at once), add a 'type' argument to enable_percpu_irq(). This allows some low-level, board specific init code to be switched to a generic API. [ tglx: Added WARN_ON argument ] Signed-off-by: Marc Zyngier Cc: Abhijeet Dharmapurikar Signed-off-by: Thomas Gleixner --- include/linux/interrupt.h | 2 +- kernel/irq/manage.c | 15 ++++++++++++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 1cdfd09c8abc..664544ff77d5 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -223,7 +223,7 @@ extern void disable_irq_nosync(unsigned int irq); extern void disable_irq(unsigned int irq); extern void disable_percpu_irq(unsigned int irq); extern void enable_irq(unsigned int irq); -extern void enable_percpu_irq(unsigned int irq); +extern void enable_percpu_irq(unsigned int irq, unsigned int type); /* The following three functions are for the core kernel use only. */ #ifdef CONFIG_GENERIC_HARDIRQS diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 7b4b156d065c..2bc86869859e 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -1419,7 +1419,7 @@ int request_any_context_irq(unsigned int irq, irq_handler_t handler, } EXPORT_SYMBOL_GPL(request_any_context_irq); -void enable_percpu_irq(unsigned int irq) +void enable_percpu_irq(unsigned int irq, unsigned int type) { unsigned int cpu = smp_processor_id(); unsigned long flags; @@ -1428,7 +1428,20 @@ void enable_percpu_irq(unsigned int irq) if (!desc) return; + type &= IRQ_TYPE_SENSE_MASK; + if (type != IRQ_TYPE_NONE) { + int ret; + + ret = __irq_set_trigger(desc, irq, type); + + if (ret) { + WARN(1, "failed to set type for IRQ%d\n, irq"); + goto out; + } + } + irq_percpu_enable(desc, cpu); +out: irq_put_desc_unlock(desc, flags); } From 32cffdde4a3ee6c2d9e0f0a94edecf1a9ce7586b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 4 Oct 2011 18:43:57 +0200 Subject: [PATCH 22/63] genirq: Fix fatfinered fixup really Putting the argument inside the quote does not really help. Signed-off-by: Thomas Gleixner --- kernel/irq/manage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 2bc86869859e..67ce837ae52c 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -1435,7 +1435,7 @@ void enable_percpu_irq(unsigned int irq, unsigned int type) ret = __irq_set_trigger(desc, irq, type); if (ret) { - WARN(1, "failed to set type for IRQ%d\n, irq"); + WARN(1, "failed to set type for IRQ%d\n", irq); goto out; } } From 8b5da2df272d5aaceb17addae8afc068b447aa51 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:53 -0400 Subject: [PATCH 23/63] ARM: mach-s3c2410: remove memory.h This also removes the mach/s3c2400 version which was probably never used due to the fact that we have this line in arch/arm/Makefile: machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 [...] This is later used to construct the search path for: The compiler would be looking into mach-s3c2410 and picking up this version first. Any config that was actually expecting the mach-s3c2400 version was therefore producing a broken kernel binary. Not relying on any of them anymore would fix that issue. Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-s3c2400/include/mach/memory.h | 20 -------------------- arch/arm/mach-s3c2410/include/mach/memory.h | 16 ---------------- 3 files changed, 1 insertion(+), 36 deletions(-) delete mode 100644 arch/arm/mach-s3c2400/include/mach/memory.h delete mode 100644 arch/arm/mach-s3c2410/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 01343438e91b..3776fccd923f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -711,6 +711,7 @@ config ARCH_S3C2410 select CLKDEV_LOOKUP select ARCH_USES_GETTIMEOFFSET select HAVE_S3C2410_I2C if I2C + select NO_MACH_MEMORY_H help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (), the IPAQ 1940 or diff --git a/arch/arm/mach-s3c2400/include/mach/memory.h b/arch/arm/mach-s3c2400/include/mach/memory.h deleted file mode 100644 index 3f33670dd012..000000000000 --- a/arch/arm/mach-s3c2400/include/mach/memory.h +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-s3c2400/include/mach/memory.h - * from arch/arm/mach-rpc/include/mach/memory.h - * - * Copyright 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * Copyright (C) 1996,1997,1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x0C000000) - -#endif diff --git a/arch/arm/mach-s3c2410/include/mach/memory.h b/arch/arm/mach-s3c2410/include/mach/memory.h deleted file mode 100644 index f92b97b89c0c..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/memory.h +++ /dev/null @@ -1,16 +0,0 @@ -/* arch/arm/mach-s3c2410/include/mach/memory.h - * from arch/arm/mach-rpc/include/mach/memory.h - * - * Copyright (C) 1996,1997,1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x30000000) - -#endif From e2c72ff9dc535e2be25736b11a42d53dfffcfbb6 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:53 -0400 Subject: [PATCH 24/63] ARM: mach-mv78xx0: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-mv78xx0/include/mach/memory.h | 10 ---------- 2 files changed, 1 insertion(+), 10 deletions(-) delete mode 100644 arch/arm/mach-mv78xx0/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3776fccd923f..b987221f085f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -541,6 +541,7 @@ config ARCH_MV78XX0 select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION + select NO_MACH_MEMORY_H help Support for the following Marvell MV78xx0 series SoCs: MV781x0, MV782x0. diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h deleted file mode 100644 index a648c51f2e42..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/memory.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * arch/arm/mach-mv78xx0/include/mach/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From 34561b557ff0a3ee0c4bdaf5a5198246e41826e4 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:53 -0400 Subject: [PATCH 25/63] ARM: mach-vexpress: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-vexpress/include/mach/memory.h | 25 -------------------- 2 files changed, 1 insertion(+), 25 deletions(-) delete mode 100644 arch/arm/mach-vexpress/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b987221f085f..47a04e59e614 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -301,6 +301,7 @@ config ARCH_VEXPRESS select ICST select PLAT_VERSATILE select PLAT_VERSATILE_CLCD + select NO_MACH_MEMORY_H help This enables support for the ARM Ltd Versatile Express boards. diff --git a/arch/arm/mach-vexpress/include/mach/memory.h b/arch/arm/mach-vexpress/include/mach/memory.h deleted file mode 100644 index 5b7fcd439d87..000000000000 --- a/arch/arm/mach-vexpress/include/mach/memory.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * arch/arm/mach-vexpress/include/mach/memory.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x60000000) - -#endif From f29781ac69c913272acf915c4d3aacc44af5ddfc Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:53 -0400 Subject: [PATCH 26/63] ARM: mach-w90x900: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-w90x900/include/mach/memory.h | 23 --------------------- 2 files changed, 1 insertion(+), 23 deletions(-) delete mode 100644 arch/arm/mach-w90x900/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 47a04e59e614..ecc18d51f332 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -590,6 +590,7 @@ config ARCH_W90X900 select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS + select NO_MACH_MEMORY_H help Support for Nuvoton (Winbond logic dept.) ARM9 processor, At present, the w90x900 has been renamed nuc900, regarding diff --git a/arch/arm/mach-w90x900/include/mach/memory.h b/arch/arm/mach-w90x900/include/mach/memory.h deleted file mode 100644 index f02905ba7746..000000000000 --- a/arch/arm/mach-w90x900/include/mach/memory.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-w90x900/include/mach/memory.h - * - * Copyright (c) 2008 Nuvoton technology corporation - * All rights reserved. - * - * Wan ZongShun - * - * Based on arch/arm/mach-s3c2410/include/mach/memory.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From b890f6b59d1210c682b310a28dabd134674b81e0 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:53 -0400 Subject: [PATCH 27/63] ARM: mach-pnx4008: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-pnx4008/include/mach/memory.h | 21 --------------------- 2 files changed, 1 insertion(+), 21 deletions(-) delete mode 100644 arch/arm/mach-pnx4008/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ecc18d51f332..dd72287cb29c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -627,6 +627,7 @@ config ARCH_PNX4008 select CPU_ARM926T select CLKDEV_LOOKUP select ARCH_USES_GETTIMEOFFSET + select NO_MACH_MEMORY_H help This enables support for Philips PNX4008 mobile platform. diff --git a/arch/arm/mach-pnx4008/include/mach/memory.h b/arch/arm/mach-pnx4008/include/mach/memory.h deleted file mode 100644 index 1275db61cee5..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/memory.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-pnx4008/include/mach/memory.h - * - * Copyright (c) 2005 Philips Semiconductors - * Copyright (c) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x80000000) - -#endif From 489a1b5b894d6df2908b914ee9d0619a8ffc8e3e Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:53 -0400 Subject: [PATCH 28/63] ARM: mach-iop32x: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-iop32x/include/mach/memory.h | 13 ------------- 2 files changed, 1 insertion(+), 13 deletions(-) delete mode 100644 arch/arm/mach-iop32x/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dd72287cb29c..2ac205106003 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -452,6 +452,7 @@ config ARCH_IOP32X select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB + select NO_MACH_MEMORY_H help Support for Intel's 80219 and IOP32X (XScale) family of processors. diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h deleted file mode 100644 index 169cc239f76c..000000000000 --- a/arch/arm/mach-iop32x/include/mach/memory.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/memory.h - */ - -#ifndef __MEMORY_H -#define __MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0xa0000000) - -#endif From 6b0e7f69ad24613c09a1bb6632d448885cf7b034 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 29/63] ARM: mach-nomadik: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-nomadik/include/mach/memory.h | 28 --------------------- 2 files changed, 1 insertion(+), 28 deletions(-) delete mode 100644 arch/arm/mach-nomadik/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2ac205106003..57d805e9e241 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -874,6 +874,7 @@ config ARCH_NOMADIK select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB + select NO_MACH_MEMORY_H help Support for the Nomadik platform by ST-Ericsson diff --git a/arch/arm/mach-nomadik/include/mach/memory.h b/arch/arm/mach-nomadik/include/mach/memory.h deleted file mode 100644 index d3325211ba6a..000000000000 --- a/arch/arm/mach-nomadik/include/mach/memory.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * mach-nomadik/include/mach/memory.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From 6d3f8b40f4b6b832491617be510970157264513a Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 30/63] ARM: mach-ux500: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-ux500/include/mach/memory.h | 18 ------------------ 2 files changed, 1 insertion(+), 18 deletions(-) delete mode 100644 arch/arm/mach-ux500/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 57d805e9e241..96531afb8fb7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -863,6 +863,7 @@ config ARCH_U8500 select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ + select NO_MACH_MEMORY_H help Support for ST-Ericsson's Ux500 architecture diff --git a/arch/arm/mach-ux500/include/mach/memory.h b/arch/arm/mach-ux500/include/mach/memory.h deleted file mode 100644 index 2ef697a67006..000000000000 --- a/arch/arm/mach-ux500/include/mach/memory.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2009 ST-Ericsson - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x00000000) -#define BUS_OFFSET UL(0x00000000) - -#endif From 2f93c8885bdb18e365e087badc076e7514b8a951 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 31/63] ARM: mach-versatile: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-versatile/include/mach/memory.h | 28 ------------------- 2 files changed, 1 insertion(+), 28 deletions(-) delete mode 100644 arch/arm/mach-versatile/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 96531afb8fb7..755f2c366fd8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -285,6 +285,7 @@ config ARCH_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_FPGA_IRQ select ARM_TIMER_SP804 + select NO_MACH_MEMORY_H help This enables support for ARM Ltd Versatile board. diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h deleted file mode 100644 index dacc9d8e4e6a..000000000000 --- a/arch/arm/mach-versatile/include/mach/memory.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/memory.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From ff4067e4cf61fff977cc5776020fb066c506ec4c Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 32/63] ARM: mach-netx: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-netx/include/mach/memory.h | 26 ------------------------ 2 files changed, 1 insertion(+), 26 deletions(-) delete mode 100644 arch/arm/mach-netx/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 755f2c366fd8..353f197d0d22 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -424,6 +424,7 @@ config ARCH_NETX select CPU_ARM926T select ARM_VIC select GENERIC_CLOCKEVENTS + select NO_MACH_MEMORY_H help This enables support for systems based on the Hilscher NetX Soc diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h deleted file mode 100644 index 59561496c36e..000000000000 --- a/arch/arm/mach-netx/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-netx/include/mach/memory.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x80000000) - -#endif - From bf45bd7687637c8731258b185fcff0c3deb3032f Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 33/63] ARM: mach-lpc32xx: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-lpc32xx/include/mach/memory.h | 27 --------------------- 2 files changed, 1 insertion(+), 27 deletions(-) delete mode 100644 arch/arm/mach-lpc32xx/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 353f197d0d22..3c2e0b50ff18 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -535,6 +535,7 @@ config ARCH_LPC32XX select CLKDEV_LOOKUP select GENERIC_TIME select GENERIC_CLOCKEVENTS + select NO_MACH_MEMORY_H help Support for the NXP LPC32XX family of processors diff --git a/arch/arm/mach-lpc32xx/include/mach/memory.h b/arch/arm/mach-lpc32xx/include/mach/memory.h deleted file mode 100644 index a647dd624afa..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/memory.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/memory.h - * - * Author: Kevin Wells - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset of bank 0 - */ -#define PLAT_PHYS_OFFSET UL(0x80000000) - -#endif From d8c9e024e300cc3dfccf96050368880ef1669426 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 34/63] ARM: mach-gemini: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-gemini/include/mach/memory.h | 19 ------------------- 2 files changed, 1 insertion(+), 19 deletions(-) delete mode 100644 arch/arm/mach-gemini/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3c2e0b50ff18..4633cb919b83 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -349,6 +349,7 @@ config ARCH_GEMINI select CPU_FA526 select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET + select NO_MACH_MEMORY_H help Support for the Cortina Systems Gemini family SoCs diff --git a/arch/arm/mach-gemini/include/mach/memory.h b/arch/arm/mach-gemini/include/mach/memory.h deleted file mode 100644 index a50915f764d8..000000000000 --- a/arch/arm/mach-gemini/include/mach/memory.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (C) 2001-2006 Storlink, Corp. - * Copyright (C) 2008-2009 Paulius Zaleckas - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ -#ifndef __MACH_MEMORY_H -#define __MACH_MEMORY_H - -#ifdef CONFIG_GEMINI_MEM_SWAP -# define PLAT_PHYS_OFFSET UL(0x00000000) -#else -# define PLAT_PHYS_OFFSET UL(0x10000000) -#endif - -#endif /* __MACH_MEMORY_H */ From 9d25544968f831e97e858bd8ec2933f225126ca8 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:54 -0400 Subject: [PATCH 35/63] ARM: mach-msm: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-msm/include/mach/memory.h | 35 ------------------------- 2 files changed, 1 insertion(+), 35 deletions(-) delete mode 100644 arch/arm/mach-msm/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4633cb919b83..fcc8ca9b351b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -660,6 +660,7 @@ config ARCH_MSM select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select NO_MACH_MEMORY_H help Support for Qualcomm MSM/QSD based systems. This runs on the apps processor of the MSM/QSD and depends on a shared memory diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h deleted file mode 100644 index 58d5e7eec431..000000000000 --- a/arch/arm/mach-msm/include/mach/memory.h +++ /dev/null @@ -1,35 +0,0 @@ -/* arch/arm/mach-msm/include/mach/memory.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* physical offset of RAM */ -#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A) -#define PLAT_PHYS_OFFSET UL(0x00000000) -#elif defined(CONFIG_ARCH_QSD8X50) -#define PLAT_PHYS_OFFSET UL(0x20000000) -#elif defined(CONFIG_ARCH_MSM7X30) -#define PLAT_PHYS_OFFSET UL(0x00000000) -#elif defined(CONFIG_ARCH_MSM8X60) -#define PLAT_PHYS_OFFSET UL(0x40000000) -#elif defined(CONFIG_ARCH_MSM8960) -#define PLAT_PHYS_OFFSET UL(0x40000000) -#else -#define PLAT_PHYS_OFFSET UL(0x10000000) -#endif - -#endif - From 94cc0a78474078e7533ccc71e9b90ee3063c843a Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 36/63] ARM: spear: remove mach/memory.h and plat/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-spear3xx/include/mach/memory.h | 19 ------------------- arch/arm/mach-spear6xx/include/mach/memory.h | 19 ------------------- arch/arm/plat-spear/include/plat/memory.h | 20 -------------------- 4 files changed, 1 insertion(+), 58 deletions(-) delete mode 100644 arch/arm/mach-spear3xx/include/mach/memory.h delete mode 100644 arch/arm/mach-spear6xx/include/mach/memory.h delete mode 100644 arch/arm/plat-spear/include/plat/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fcc8ca9b351b..f690b5477604 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -917,6 +917,7 @@ config PLAT_SPEAR select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_CLK + select NO_MACH_MEMORY_H help Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). diff --git a/arch/arm/mach-spear3xx/include/mach/memory.h b/arch/arm/mach-spear3xx/include/mach/memory.h deleted file mode 100644 index 51735221ea19..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/memory.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/memory.h - * - * Memory map for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_MEMORY_H -#define __MACH_MEMORY_H - -#include - -#endif /* __MACH_MEMORY_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/memory.h b/arch/arm/mach-spear6xx/include/mach/memory.h deleted file mode 100644 index 781f088fc228..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/memory.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-spear6xx/include/mach/memory.h - * - * Memory map for SPEAr6xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Rajeev Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_MEMORY_H -#define __MACH_MEMORY_H - -#include - -#endif /* __MACH_MEMORY_H */ diff --git a/arch/arm/plat-spear/include/plat/memory.h b/arch/arm/plat-spear/include/plat/memory.h deleted file mode 100644 index 7e3599e1104e..000000000000 --- a/arch/arm/plat-spear/include/plat/memory.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/memory.h - * - * Memory map for SPEAr platform - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_MEMORY_H -#define __PLAT_MEMORY_H - -/* Physical DRAM offset */ -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif /* __PLAT_MEMORY_H */ From a109d811bab30d44ee775a9f15348add7014180c Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 37/63] ARM: mach-mxs: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-mxs/include/mach/memory.h | 24 ------------------------ 2 files changed, 1 insertion(+), 24 deletions(-) delete mode 100644 arch/arm/mach-mxs/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f690b5477604..cb4ac95297b4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -416,6 +416,7 @@ config ARCH_MXS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO + select NO_MACH_MEMORY_H help Support for Freescale MXS-based family of processors diff --git a/arch/arm/mach-mxs/include/mach/memory.h b/arch/arm/mach-mxs/include/mach/memory.h deleted file mode 100644 index b5420a5c2d4b..000000000000 --- a/arch/arm/mach-mxs/include/mach/memory.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef __MACH_MXS_MEMORY_H__ -#define __MACH_MXS_MEMORY_H__ - -#define PHYS_OFFSET UL(0x40000000) - -#endif /* __MACH_MXS_MEMORY_H__ */ From 6b1f1005f3dbc6fe52c68c2fccb525a0ebcc9afa Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 38/63] ARM: mach-nuc93x: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-nuc93x/include/mach/memory.h | 21 --------------------- 2 files changed, 1 insertion(+), 21 deletions(-) delete mode 100644 arch/arm/mach-nuc93x/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cb4ac95297b4..44a2ad7c4c25 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -610,6 +610,7 @@ config ARCH_NUC93X bool "Nuvoton NUC93X CPU" select CPU_ARM926T select CLKDEV_LOOKUP + select NO_MACH_MEMORY_H help Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a low-power and high performance MPEG-4/JPEG multimedia controller chip. diff --git a/arch/arm/mach-nuc93x/include/mach/memory.h b/arch/arm/mach-nuc93x/include/mach/memory.h deleted file mode 100644 index ef9864b002a6..000000000000 --- a/arch/arm/mach-nuc93x/include/mach/memory.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-nuc93x/include/mach/memory.h - * - * Copyright (c) 2008 Nuvoton technology corporation - * All rights reserved. - * - * Wan ZongShun - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From 17108711c556b44c1d805bbb3f3ac81011c5dd6a Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 39/63] ARM: mach-cns3xxx: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-cns3xxx/include/mach/memory.h | 26 --------------------- 2 files changed, 1 insertion(+), 26 deletions(-) delete mode 100644 arch/arm/mach-cns3xxx/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 44a2ad7c4c25..560cc11af7a0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -341,6 +341,7 @@ config ARCH_CNS3XXX select ARM_GIC select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI + select NO_MACH_MEMORY_H help Support for Cavium Networks CNS3XXX platform. diff --git a/arch/arm/mach-cns3xxx/include/mach/memory.h b/arch/arm/mach-cns3xxx/include/mach/memory.h deleted file mode 100644 index dc16c5c5d86b..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright 2003 ARM Limited - * Copyright 2008 Cavium Networks - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, Version 2, as - * published by the Free Software Foundation. - */ - -#ifndef __MACH_MEMORY_H -#define __MACH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#define __phys_to_bus(x) ((x) + PHYS_OFFSET) -#define __bus_to_phys(x) ((x) - PHYS_OFFSET) - -#define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v)) -#define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b)) -#define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p)) -#define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b)) - -#endif From 9b15e4fe00a136471d4ad22debcb0b270401cefc Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 40/63] ARM: mach-mmp: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-mmp/include/mach/memory.h | 14 -------------- 2 files changed, 1 insertion(+), 14 deletions(-) delete mode 100644 arch/arm/mach-mmp/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 560cc11af7a0..6e277c4487d8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -578,6 +578,7 @@ config ARCH_MMP select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ + select NO_MACH_MEMORY_H help Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. diff --git a/arch/arm/mach-mmp/include/mach/memory.h b/arch/arm/mach-mmp/include/mach/memory.h deleted file mode 100644 index d68b50a2d6a0..000000000000 --- a/arch/arm/mach-mmp/include/mach/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * linux/arch/arm/mach-mmp/include/mach/memory.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_MEMORY_H -#define __ASM_MACH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif /* __ASM_MACH_MEMORY_H */ From 3044454779b1e8ffb536b79ffbbbfc731fc84fdf Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 41/63] ARM: plat-tcc: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/plat-tcc/include/mach/memory.h | 18 ------------------ 2 files changed, 1 insertion(+), 18 deletions(-) delete mode 100644 arch/arm/plat-tcc/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6e277c4487d8..49badb13be45 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -845,6 +845,7 @@ config ARCH_TCC_926 select HAVE_CLK select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS + select NO_MACH_MEMORY_H help Support for Telechips TCC ARM926-based systems. diff --git a/arch/arm/plat-tcc/include/mach/memory.h b/arch/arm/plat-tcc/include/mach/memory.h deleted file mode 100644 index 28a6e0cd13b3..000000000000 --- a/arch/arm/plat-tcc/include/mach/memory.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 RidgeRun, Inc. - * Copyright (C) 2008-2009 Telechips - * Copyright (C) 2010 Hans J. Koch - * - * Licensed under the terms of the GPL v2. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x20000000) - -#endif From f8bc5ddf139e05b21a768bc837d48f3db61c0d96 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 42/63] ARM: mach-tegra: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-tegra/include/mach/memory.h | 28 ----------------------- 2 files changed, 1 insertion(+), 28 deletions(-) delete mode 100644 arch/arm/mach-tegra/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 49badb13be45..549e77a05e9a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -627,6 +627,7 @@ config ARCH_TEGRA select HAVE_CLK select HAVE_SCHED_CLOCK select ARCH_HAS_CPUFREQ + select NO_MACH_MEMORY_H help This enables support for NVIDIA Tegra based systems (Tegra APX, Tegra 6xx and Tegra 2 series). diff --git a/arch/arm/mach-tegra/include/mach/memory.h b/arch/arm/mach-tegra/include/mach/memory.h deleted file mode 100644 index 537db3aa81a7..000000000000 --- a/arch/arm/mach-tegra/include/mach/memory.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/memory.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross - * Erik Gilling - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_MEMORY_H -#define __MACH_TEGRA_MEMORY_H - -/* physical offset of RAM */ -#define PLAT_PHYS_OFFSET UL(0) - -#endif - From 476eb37ad799e9ed5f540a08485359258ce95549 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:55 -0400 Subject: [PATCH 43/63] ARM: mach-s5pc100: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-s5pc100/include/mach/memory.h | 18 ------------------ 2 files changed, 1 insertion(+), 18 deletions(-) delete mode 100644 arch/arm/mach-s5pc100/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 549e77a05e9a..09da28b66a87 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -789,6 +789,7 @@ config ARCH_S5PC100 select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG + select NO_MACH_MEMORY_H help Samsung S5PC100 series based systems diff --git a/arch/arm/mach-s5pc100/include/mach/memory.h b/arch/arm/mach-s5pc100/include/mach/memory.h deleted file mode 100644 index bda4e79fd5fc..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/memory.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/memory.h - * - * Copyright 2008 Samsung Electronics Co. - * Byungho Min - * - * Based on mach-s3c6400/include/mach/memory.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x20000000) - -#endif From e41fa86e558f3d129658d7447deceef30ddf6205 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:56 -0400 Subject: [PATCH 44/63] ARM: mach-vt8500: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-vt8500/include/mach/memory.h | 28 ---------------------- 2 files changed, 1 insertion(+), 28 deletions(-) delete mode 100644 arch/arm/mach-vt8500/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 09da28b66a87..94a38e9d74e2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -936,6 +936,7 @@ config ARCH_VT8500 select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select HAVE_PWM + select NO_MACH_MEMORY_H help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. diff --git a/arch/arm/mach-vt8500/include/mach/memory.h b/arch/arm/mach-vt8500/include/mach/memory.h deleted file mode 100644 index 175f914eff93..000000000000 --- a/arch/arm/mach-vt8500/include/mach/memory.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-vt8500/include/mach/memory.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -#endif From 2e5df8d28ae2b6790539b95b8fc295ac63f862ff Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:56 -0400 Subject: [PATCH 45/63] ARM: mach-h720x: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-h720x/include/mach/memory.h | 11 ----------- 2 files changed, 1 insertion(+), 11 deletions(-) delete mode 100644 arch/arm/mach-h720x/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 94a38e9d74e2..907f3da9cce3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -436,6 +436,7 @@ config ARCH_H720X select CPU_ARM720T select ISA_DMA_API select ARCH_USES_GETTIMEOFFSET + select NO_MACH_MEMORY_H help This enables support for systems based on the Hynix HMS720x diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h deleted file mode 100644 index 96dcf50c51d3..000000000000 --- a/arch/arm/mach-h720x/include/mach/memory.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * arch/arm/mach-h720x/include/mach/memory.h - * - * Copyright (c) 2000 Jungjun Kim - * - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x40000000) -#endif From 3bc465aab08f382a3005aa56296a3f7a549f379f Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:57 -0400 Subject: [PATCH 46/63] ARM: mach-ixp4xx: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-ixp4xx/include/mach/memory.h | 17 ----------------- 2 files changed, 1 insertion(+), 17 deletions(-) delete mode 100644 arch/arm/mach-ixp4xx/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 907f3da9cce3..30ced8d7282c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -502,6 +502,7 @@ config ARCH_IXP4XX select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI select DMABOUNCE if PCI + select NO_MACH_MEMORY_H help Support for Intel's IXP4XX (XScale) family of processors. diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h deleted file mode 100644 index 4caf1761f1e2..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/memory.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-ixp4xx/include/mach/memory.h - * - * Copyright (c) 2001-2004 MontaVista Software, Inc. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif From f4220feb35e39dc3963f27dcce48b4dea398a83b Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:57 -0400 Subject: [PATCH 47/63] ARM: mach-pxa: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-pxa/include/mach/memory.h | 20 -------------------- arch/arm/mach-pxa/z2.c | 2 +- 3 files changed, 2 insertions(+), 21 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 30ced8d7282c..f7041031bb1f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -658,6 +658,7 @@ config ARCH_PXA select SPARSE_IRQ select AUTO_ZRELADDR select MULTI_IRQ_HANDLER + select NO_MACH_MEMORY_H help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h deleted file mode 100644 index d05a59727d66..000000000000 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/memory.h - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PLAT_PHYS_OFFSET UL(0xa0000000) - -#endif diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index 65fed3753fa2..84ed72de53b5 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -686,7 +686,7 @@ static void z2_power_off(void) */ PSPR = 0x0; local_irq_disable(); - pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); + pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PHYS_OFFSET - PAGE_OFFSET); } #else #define z2_power_off NULL From 0020afb369859472a461ef4af6410732e929d402 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 5 Jul 2011 22:52:57 -0400 Subject: [PATCH 48/63] ARM: mach-davinci: remove mach/memory.h Move some DDR2 related defines into a private beforehand. Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-davinci/cpuidle.c | 2 +- arch/arm/mach-davinci/include/mach/ddr2.h | 4 +++ arch/arm/mach-davinci/include/mach/memory.h | 39 --------------------- arch/arm/mach-davinci/sleep.S | 2 +- 5 files changed, 7 insertions(+), 41 deletions(-) create mode 100644 arch/arm/mach-davinci/include/mach/ddr2.h delete mode 100644 arch/arm/mach-davinci/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f7041031bb1f..564be51d32df 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -904,6 +904,7 @@ config ARCH_DAVINCI select GENERIC_ALLOCATOR select GENERIC_IRQ_CHIP select ARCH_HAS_HOLES_MEMORYMODEL + select NO_MACH_MEMORY_H help Support for TI's DaVinci platform. diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c index bd59f31b8a95..0b314bf16f7f 100644 --- a/arch/arm/mach-davinci/cpuidle.c +++ b/arch/arm/mach-davinci/cpuidle.c @@ -19,7 +19,7 @@ #include #include -#include +#include #define DAVINCI_CPUIDLE_MAX_STATES 2 diff --git a/arch/arm/mach-davinci/include/mach/ddr2.h b/arch/arm/mach-davinci/include/mach/ddr2.h new file mode 100644 index 000000000000..c19e047d0e6a --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/ddr2.h @@ -0,0 +1,4 @@ +#define DDR2_SDRCR_OFFSET 0xc +#define DDR2_SRPD_BIT (1 << 23) +#define DDR2_MCLKSTOPEN_BIT (1 << 30) +#define DDR2_LPMODEN_BIT (1 << 31) diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h deleted file mode 100644 index 885d23319668..000000000000 --- a/arch/arm/mach-davinci/include/mach/memory.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * DaVinci memory space definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/************************************************************************** - * Included Files - **************************************************************************/ -#include -#include - -/************************************************************************** - * Definitions - **************************************************************************/ -#define DAVINCI_DDR_BASE 0x80000000 -#define DA8XX_DDR_BASE 0xc0000000 - -#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) -#error Cannot enable DaVinci and DA8XX platforms concurrently -#elif defined(CONFIG_ARCH_DAVINCI_DA8XX) -#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE -#else -#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE -#endif - -#define DDR2_SDRCR_OFFSET 0xc -#define DDR2_SRPD_BIT BIT(23) -#define DDR2_MCLKSTOPEN_BIT BIT(30) -#define DDR2_LPMODEN_BIT BIT(31) - -#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S index fb5e72b532b0..574028995545 100644 --- a/arch/arm/mach-davinci/sleep.S +++ b/arch/arm/mach-davinci/sleep.S @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include "clock.h" From 0e79671e13d12e44938f5caea83176706e56e7ca Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 17:09:17 -0400 Subject: [PATCH 49/63] ARM: mach-bcmring: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-bcmring/include/mach/hardware.h | 3 +- arch/arm/mach-bcmring/include/mach/memory.h | 28 ------------------- 3 files changed, 2 insertions(+), 30 deletions(-) delete mode 100644 arch/arm/mach-bcmring/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 564be51d32df..2dd0db697f66 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -324,6 +324,7 @@ config ARCH_BCMRING select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB + select NO_MACH_MEMORY_H help Support for Broadcom's BCMRing platform. diff --git a/arch/arm/mach-bcmring/include/mach/hardware.h b/arch/arm/mach-bcmring/include/mach/hardware.h index ed78aabb8e9f..6ae20a649a97 100644 --- a/arch/arm/mach-bcmring/include/mach/hardware.h +++ b/arch/arm/mach-bcmring/include/mach/hardware.h @@ -22,7 +22,6 @@ #define __ASM_ARCH_HARDWARE_H #include -#include #include #include @@ -31,7 +30,7 @@ * *_SIZE is the size of the region * *_BASE is the virtual address */ -#define RAM_START PLAT_PHYS_OFFSET +#define RAM_START PHYS_OFFSET #define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED) #define RAM_BASE PAGE_OFFSET diff --git a/arch/arm/mach-bcmring/include/mach/memory.h b/arch/arm/mach-bcmring/include/mach/memory.h deleted file mode 100644 index 8848a5bb3445..000000000000 --- a/arch/arm/mach-bcmring/include/mach/memory.h +++ /dev/null @@ -1,28 +0,0 @@ -/***************************************************************************** -* Copyright 2005 - 2008 Broadcom Corporation. All rights reserved. -* -* Unless you and Broadcom execute a separate written software license -* agreement governing use of this software, this software is licensed to you -* under the terms of the GNU General Public License version 2, available at -* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -* -* Notwithstanding the above, under no circumstances may you combine this -* software in any way with any other Broadcom software provided under a -* license other than the GPL, without Broadcom's express prior written -* consent. -*****************************************************************************/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical vs virtual RAM address space conversion. These are - * private definitions which should NOT be used outside memory.h - * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. - */ - -#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE - -#endif From f431eb6960848302e82b7156bf30f726c8e6e7bc Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 17:22:03 -0400 Subject: [PATCH 50/63] ARM: mach-zynq: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-zynq/include/mach/memory.h | 22 ---------------------- 2 files changed, 1 insertion(+), 22 deletions(-) delete mode 100644 arch/arm/mach-zynq/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2dd0db697f66..322e48ce451c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -955,6 +955,7 @@ config ARCH_ZYNQ select ARM_AMBA select ICST select USE_OF + select NO_MACH_MEMORY_H help Support for Xilinx Zynq ARM Cortex A9 Platform endchoice diff --git a/arch/arm/mach-zynq/include/mach/memory.h b/arch/arm/mach-zynq/include/mach/memory.h deleted file mode 100644 index 35a92634dcc1..000000000000 --- a/arch/arm/mach-zynq/include/mach/memory.h +++ /dev/null @@ -1,22 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/memory.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_MEMORY_H__ -#define __MACH_MEMORY_H__ - -#include - -#define PLAT_PHYS_OFFSET UL(0x0) - -#endif From 17dea45adbd2c2df726699b25e2ddf8916d5eb87 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 21:18:52 -0400 Subject: [PATCH 51/63] ARM: mach-prima2: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-prima2/include/mach/memory.h | 14 -------------- arch/arm/mach-prima2/l2x0.c | 5 ++--- 3 files changed, 3 insertions(+), 17 deletions(-) delete mode 100644 arch/arm/mach-prima2/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 322e48ce451c..b30cf6437c99 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -365,6 +365,7 @@ config ARCH_PRIMA2 select GENERIC_IRQ_CHIP select USE_OF select ZONE_DMA + select NO_MACH_MEMORY_H help Support for CSR SiRFSoC ARM Cortex A9 Platform diff --git a/arch/arm/mach-prima2/include/mach/memory.h b/arch/arm/mach-prima2/include/mach/memory.h deleted file mode 100644 index 0d5ee6af8c54..000000000000 --- a/arch/arm/mach-prima2/include/mach/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * arch/arm/mach-prima2/include/mach/memory.h - * - * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x00000000) - -#endif diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c index 9cda2057bcfb..66c6387e5a04 100644 --- a/arch/arm/mach-prima2/l2x0.c +++ b/arch/arm/mach-prima2/l2x0.c @@ -13,7 +13,6 @@ #include #include #include -#include #define L2X0_ADDR_FILTERING_START 0xC00 #define L2X0_ADDR_FILTERING_END 0xC04 @@ -41,9 +40,9 @@ static int __init sirfsoc_of_l2x_init(void) /* * set the physical memory windows L2 cache will cover */ - writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024, + writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024, sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END); - writel_relaxed(PLAT_PHYS_OFFSET | 0x1, + writel_relaxed(PHYS_OFFSET | 0x1, sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START); writel_relaxed(0, From c039bad00f21a025df6fcb238578023c2cc881bf Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 21:45:26 -0400 Subject: [PATCH 52/63] ARM: plat-mxc: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/plat-mxc/include/mach/memory.h | 43 ------------------------- 2 files changed, 1 insertion(+), 43 deletions(-) delete mode 100644 arch/arm/plat-mxc/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b30cf6437c99..408d413826cb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -410,6 +410,7 @@ config ARCH_MXC select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK + select NO_MACH_MEMORY_H help Support for Freescale MXC/iMX-based family of processors diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h deleted file mode 100644 index 3ec84b902243..000000000000 --- a/arch/arm/plat-mxc/include/mach/memory.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_MEMORY_H__ -#define __ASM_ARCH_MXC_MEMORY_H__ - -#define MX1_PHYS_OFFSET UL(0x08000000) -#define MX21_PHYS_OFFSET UL(0xc0000000) -#define MX25_PHYS_OFFSET UL(0x80000000) -#define MX27_PHYS_OFFSET UL(0xa0000000) -#define MX3x_PHYS_OFFSET UL(0x80000000) -#define MX50_PHYS_OFFSET UL(0x70000000) -#define MX51_PHYS_OFFSET UL(0x90000000) -#define MX53_PHYS_OFFSET UL(0x70000000) - -#if !defined(CONFIG_RUNTIME_PHYS_OFFSET) -# if defined CONFIG_ARCH_MX1 -# define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET -# elif defined CONFIG_MACH_MX21 -# define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET -# elif defined CONFIG_ARCH_MX25 -# define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET -# elif defined CONFIG_MACH_MX27 -# define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET -# elif defined CONFIG_ARCH_MX3 -# define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET -# elif defined CONFIG_ARCH_MX50 -# define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET -# elif defined CONFIG_ARCH_MX51 -# define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET -# elif defined CONFIG_ARCH_MX53 -# define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET -# endif -#endif - -#endif /* __ASM_ARCH_MXC_MEMORY_H__ */ From b4be3999d1895c9697580574ca4ea52d84bc4ddd Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 21:48:28 -0400 Subject: [PATCH 53/63] ARM: mach-s3c64xx: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-s3c64xx/include/mach/memory.h | 18 ------------------ 2 files changed, 1 insertion(+), 18 deletions(-) delete mode 100644 arch/arm/mach-s3c64xx/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 408d413826cb..a87deac9f768 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -765,6 +765,7 @@ config ARCH_S3C64XX select SAMSUNG_GPIOLIB_4BIT select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG + select NO_MACH_MEMORY_H help Samsung S3C64XX series based systems diff --git a/arch/arm/mach-s3c64xx/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h deleted file mode 100644 index b704669f95ff..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/memory.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s3c6400/include/mach/memory.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x50000000) - -#endif From 48de58e34ed379fa99d392a393b8d8343ab48515 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 21:51:43 -0400 Subject: [PATCH 54/63] ARM: mach-s5p64x0: remove mach/memory.h Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 1 + arch/arm/mach-s5p64x0/include/mach/memory.h | 18 ------------------ 2 files changed, 1 insertion(+), 18 deletions(-) delete mode 100644 arch/arm/mach-s5p64x0/include/mach/memory.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a87deac9f768..81148f415352 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -781,6 +781,7 @@ config ARCH_S5P64X0 select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS + select NO_MACH_MEMORY_H help Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, SMDK6450. diff --git a/arch/arm/mach-s5p64x0/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h deleted file mode 100644 index b14cbc3f521b..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/memory.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/memory.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Memory definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H __FILE__ - -#define PLAT_PHYS_OFFSET UL(0x20000000) - -#endif /* __ASM_ARCH_MEMORY_H */ From 0cdc8b921d68817b687755b4f6ae20cd8ff1d026 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 2 Sep 2011 22:26:55 -0400 Subject: [PATCH 55/63] ARM: switch from NO_MACH_MEMORY_H to NEED_MACH_MEMORY_H Given that we want the default to not have any and given that there are now fewer cases where it is still provided than the cases where it is not at this point, this makes sense to invert the logic and just identify the exception cases. The word "need" instead of "have" was chosen to construct the config symbol so not to suggest that having a mach/memory.h file is actually a feature that one should aim for. Signed-off-by: Nicolas Pitre --- arch/arm/Kconfig | 61 +++++++++++++---------------------- arch/arm/include/asm/memory.h | 2 +- arch/arm/plat-omap/Kconfig | 2 +- 3 files changed, 24 insertions(+), 41 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 81148f415352..b7f7510658d6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -211,14 +211,16 @@ config ARM_PATCH_PHYS_VIRT this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. -config NO_MACH_MEMORY_H +config NEED_MACH_MEMORY_H bool help - Select this when mach/memory.h is removed. + Select this when mach/memory.h is required to provide special + definitions for this platform. The need for mach/memory.h should + be avoided when possible. config PHYS_OFFSET hex "Physical address of main memory" - depends on !ARM_PATCH_PHYS_VIRT && NO_MACH_MEMORY_H + depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H help Please provide the physical address corresponding to the location of main memory in your system. @@ -254,6 +256,7 @@ config ARCH_INTEGRATOR select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ + select NEED_MACH_MEMORY_H help Support for ARM's Integrator platform. @@ -269,6 +272,7 @@ config ARCH_REALVIEW select PLAT_VERSATILE_CLCD select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB + select NEED_MACH_MEMORY_H help This enables support for ARM Ltd RealView boards. @@ -285,7 +289,6 @@ config ARCH_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_FPGA_IRQ select ARM_TIMER_SP804 - select NO_MACH_MEMORY_H help This enables support for ARM Ltd Versatile board. @@ -302,7 +305,6 @@ config ARCH_VEXPRESS select ICST select PLAT_VERSATILE select PLAT_VERSATILE_CLCD - select NO_MACH_MEMORY_H help This enables support for the ARM Ltd Versatile Express boards. @@ -324,7 +326,6 @@ config ARCH_BCMRING select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB - select NO_MACH_MEMORY_H help Support for Broadcom's BCMRing platform. @@ -332,6 +333,7 @@ config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x-based" select CPU_ARM720T select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help Support for Cirrus Logic 711x/721x based boards. @@ -342,7 +344,6 @@ config ARCH_CNS3XXX select ARM_GIC select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI - select NO_MACH_MEMORY_H help Support for Cavium Networks CNS3XXX platform. @@ -351,7 +352,6 @@ config ARCH_GEMINI select CPU_FA526 select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET - select NO_MACH_MEMORY_H help Support for the Cortina Systems Gemini family SoCs @@ -365,7 +365,6 @@ config ARCH_PRIMA2 select GENERIC_IRQ_CHIP select USE_OF select ZONE_DMA - select NO_MACH_MEMORY_H help Support for CSR SiRFSoC ARM Cortex A9 Platform @@ -375,6 +374,7 @@ config ARCH_EBSA110 select ISA select NO_IOPORT select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an @@ -390,6 +390,7 @@ config ARCH_EP93XX select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_USES_GETTIMEOFFSET + select NEED_MEMORY_H help This enables support for the Cirrus EP93xx series of CPUs. @@ -398,6 +399,7 @@ config ARCH_FOOTBRIDGE select CPU_SA110 select FOOTBRIDGE select GENERIC_CLOCKEVENTS + select NEED_MACH_MEMORY_H help Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. @@ -410,7 +412,6 @@ config ARCH_MXC select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK - select NO_MACH_MEMORY_H help Support for Freescale MXC/iMX-based family of processors @@ -420,7 +421,6 @@ config ARCH_MXS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO - select NO_MACH_MEMORY_H help Support for Freescale MXS-based family of processors @@ -430,7 +430,6 @@ config ARCH_NETX select CPU_ARM926T select ARM_VIC select GENERIC_CLOCKEVENTS - select NO_MACH_MEMORY_H help This enables support for systems based on the Hilscher NetX Soc @@ -439,7 +438,6 @@ config ARCH_H720X select CPU_ARM720T select ISA_DMA_API select ARCH_USES_GETTIMEOFFSET - select NO_MACH_MEMORY_H help This enables support for systems based on the Hynix HMS720x @@ -451,6 +449,7 @@ config ARCH_IOP13XX select PCI select ARCH_SUPPORTS_MSI select VMSPLIT_1G + select NEED_MACH_MEMORY_H help Support for Intel's IOP13XX (XScale) family of processors. @@ -461,7 +460,6 @@ config ARCH_IOP32X select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB - select NO_MACH_MEMORY_H help Support for Intel's 80219 and IOP32X (XScale) family of processors. @@ -473,7 +471,6 @@ config ARCH_IOP33X select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB - select NO_MACH_MEMORY_H help Support for Intel's IOP33X (XScale) family of processors. @@ -483,6 +480,7 @@ config ARCH_IXP23XX select CPU_XSC3 select PCI select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help Support for Intel's IXP23xx (XScale) family of processors. @@ -492,6 +490,7 @@ config ARCH_IXP2000 select CPU_XSCALE select PCI select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help Support for Intel's IXP2400/2800 (XScale) family of processors. @@ -505,7 +504,6 @@ config ARCH_IXP4XX select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI select DMABOUNCE if PCI - select NO_MACH_MEMORY_H help Support for Intel's IXP4XX (XScale) family of processors. @@ -516,7 +514,6 @@ config ARCH_DOVE select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION - select NO_MACH_MEMORY_H help Support for the Marvell Dove SoC 88AP510 @@ -527,7 +524,6 @@ config ARCH_KIRKWOOD select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION - select NO_MACH_MEMORY_H help Support for the following Marvell Kirkwood series SoCs: 88F6180, 88F6192 and 88F6281. @@ -543,7 +539,6 @@ config ARCH_LPC32XX select CLKDEV_LOOKUP select GENERIC_TIME select GENERIC_CLOCKEVENTS - select NO_MACH_MEMORY_H help Support for the NXP LPC32XX family of processors @@ -554,7 +549,6 @@ config ARCH_MV78XX0 select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION - select NO_MACH_MEMORY_H help Support for the following Marvell MV78xx0 series SoCs: MV781x0, MV782x0. @@ -567,7 +561,6 @@ config ARCH_ORION5X select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select PLAT_ORION - select NO_MACH_MEMORY_H help Support for the following Marvell Orion 5x series SoCs: Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), @@ -583,7 +576,6 @@ config ARCH_MMP select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ - select NO_MACH_MEMORY_H help Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. @@ -592,6 +584,7 @@ config ARCH_KS8695 select CPU_ARM922T select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based System-on-Chip devices. @@ -603,7 +596,6 @@ config ARCH_W90X900 select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS - select NO_MACH_MEMORY_H help Support for Nuvoton (Winbond logic dept.) ARM9 processor, At present, the w90x900 has been renamed nuc900, regarding @@ -617,7 +609,6 @@ config ARCH_NUC93X bool "Nuvoton NUC93X CPU" select CPU_ARM926T select CLKDEV_LOOKUP - select NO_MACH_MEMORY_H help Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a low-power and high performance MPEG-4/JPEG multimedia controller chip. @@ -632,7 +623,6 @@ config ARCH_TEGRA select HAVE_CLK select HAVE_SCHED_CLOCK select ARCH_HAS_CPUFREQ - select NO_MACH_MEMORY_H help This enables support for NVIDIA Tegra based systems (Tegra APX, Tegra 6xx and Tegra 2 series). @@ -642,7 +632,6 @@ config ARCH_PNX4008 select CPU_ARM926T select CLKDEV_LOOKUP select ARCH_USES_GETTIMEOFFSET - select NO_MACH_MEMORY_H help This enables support for Philips PNX4008 mobile platform. @@ -661,7 +650,6 @@ config ARCH_PXA select SPARSE_IRQ select AUTO_ZRELADDR select MULTI_IRQ_HANDLER - select NO_MACH_MEMORY_H help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. @@ -671,7 +659,6 @@ config ARCH_MSM select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP - select NO_MACH_MEMORY_H help Support for Qualcomm MSM/QSD based systems. This runs on the apps processor of the MSM/QSD and depends on a shared memory @@ -689,6 +676,7 @@ config ARCH_SHMOBILE select SPARSE_IRQ select MULTI_IRQ_HANDLER select PM_GENERIC_DOMAINS if PM + select NEED_MACH_MEMORY_H help Support for Renesas's SH-Mobile and R-Mobile ARM platforms. @@ -703,6 +691,7 @@ config ARCH_RPC select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. @@ -721,6 +710,7 @@ config ARCH_SA1100 select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB + select NEED_MACH_MEMORY_H help Support for StrongARM 11x0 based boards. @@ -732,7 +722,6 @@ config ARCH_S3C2410 select CLKDEV_LOOKUP select ARCH_USES_GETTIMEOFFSET select HAVE_S3C2410_I2C if I2C - select NO_MACH_MEMORY_H help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (), the IPAQ 1940 or @@ -765,7 +754,6 @@ config ARCH_S3C64XX select SAMSUNG_GPIOLIB_4BIT select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG - select NO_MACH_MEMORY_H help Samsung S3C64XX series based systems @@ -781,7 +769,6 @@ config ARCH_S5P64X0 select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS - select NO_MACH_MEMORY_H help Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, SMDK6450. @@ -797,7 +784,6 @@ config ARCH_S5PC100 select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG - select NO_MACH_MEMORY_H help Samsung S5PC100 series based systems @@ -817,6 +803,7 @@ config ARCH_S5PV210 select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG + select NEED_MACH_MEMORY_H help Samsung S5PV210/S5PC110 series based systems @@ -833,6 +820,7 @@ config ARCH_EXYNOS4 select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG + select NEED_MACH_MEMORY_H help Samsung EXYNOS4 series based systems @@ -844,6 +832,7 @@ config ARCH_SHARK select ZONE_DMA select PCI select ARCH_USES_GETTIMEOFFSET + select NEED_MACH_MEMORY_H help Support for the StrongARM based Digital DNARD machine, also known as "Shark" (). @@ -855,7 +844,6 @@ config ARCH_TCC_926 select HAVE_CLK select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS - select NO_MACH_MEMORY_H help Support for Telechips TCC ARM926-based systems. @@ -872,6 +860,7 @@ config ARCH_U300 select CLKDEV_LOOKUP select HAVE_MACH_CLKDEV select GENERIC_GPIO + select NEED_MACH_MEMORY_H help Support for ST-Ericsson U300 series mobile platforms. @@ -883,7 +872,6 @@ config ARCH_U8500 select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ - select NO_MACH_MEMORY_H help Support for ST-Ericsson's Ux500 architecture @@ -895,7 +883,6 @@ config ARCH_NOMADIK select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB - select NO_MACH_MEMORY_H help Support for the Nomadik platform by ST-Ericsson @@ -909,7 +896,6 @@ config ARCH_DAVINCI select GENERIC_ALLOCATOR select GENERIC_IRQ_CHIP select ARCH_HAS_HOLES_MEMORYMODEL - select NO_MACH_MEMORY_H help Support for TI's DaVinci platform. @@ -933,7 +919,6 @@ config PLAT_SPEAR select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_CLK - select NO_MACH_MEMORY_H help Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). @@ -945,7 +930,6 @@ config ARCH_VT8500 select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select HAVE_PWM - select NO_MACH_MEMORY_H help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. @@ -959,7 +943,6 @@ config ARCH_ZYNQ select ARM_AMBA select ICST select USE_OF - select NO_MACH_MEMORY_H help Support for Xilinx Zynq ARM Cortex A9 Platform endchoice diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 046c915694cd..a8997d71084e 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -18,7 +18,7 @@ #include #include -#ifndef CONFIG_NO_MACH_MEMORY_H +#ifdef CONFIG_NEED_MACH_MEMORY_H #include #endif diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index e00fe764045a..95732af7b208 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -14,6 +14,7 @@ config ARCH_OMAP1 select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP + select NEED_MACH_MEMORY_H help "Systems based on omap7xx, omap15xx or omap16xx" @@ -22,7 +23,6 @@ config ARCH_OMAP2PLUS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP select OMAP_DM_TIMER - select NO_MACH_MEMORY_H help "Systems based on OMAP2, OMAP3 or OMAP4" From a06f916b7a9b57447ceb875eb0a89f1a66b31bca Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 20 Oct 2011 22:04:18 +0100 Subject: [PATCH 56/63] ARM: smp: fix clipping of number of CPUs Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: Reported-by: Mark Salter Signed-off-by: Russell King --- arch/arm/mach-exynos4/platsmp.c | 10 ++++------ arch/arm/mach-msm/platsmp.c | 6 ++++++ arch/arm/mach-omap2/omap-smp.c | 10 ++++------ arch/arm/mach-realview/platsmp.c | 10 ++++------ arch/arm/mach-shmobile/platsmp.c | 6 ++++++ arch/arm/mach-tegra/platsmp.c | 8 ++++---- arch/arm/mach-ux500/platsmp.c | 10 ++++------ arch/arm/mach-vexpress/ct-ca9x4.c | 6 ++++++ 8 files changed, 38 insertions(+), 28 deletions(-) diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c index 7c2282c6ba81..a08c536923f9 100644 --- a/arch/arm/mach-exynos4/platsmp.c +++ b/arch/arm/mach-exynos4/platsmp.c @@ -191,12 +191,10 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "EXYNOS4: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 1a1af9e56250..727659520912 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -156,6 +156,12 @@ void __init smp_init_cpus(void) { unsigned int i, ncores = get_core_count(); + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + for (i = 0; i < ncores; i++) set_cpu_possible(i, true); diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index ce65e9329c7b..889464dc7b2d 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -109,12 +109,10 @@ void __init smp_init_cpus(void) ncores = scu_get_core_count(scu_base); /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "OMAP4: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 4ae943bafa92..e83c654a58d0 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -52,12 +52,10 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "Realview: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index 66f980625a33..e4e485fa2532 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c @@ -56,6 +56,12 @@ void __init smp_init_cpus(void) unsigned int ncores = shmobile_smp_get_core_count(); unsigned int i; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + for (i = 0; i < ncores; i++) set_cpu_possible(i, true); diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 0886cbccddee..7d2b5d03c1df 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -114,10 +114,10 @@ void __init smp_init_cpus(void) { unsigned int i, ncores = scu_get_core_count(scu_base); - if (ncores > NR_CPUS) { - printk(KERN_ERR "Tegra: no. of cores (%u) greater than configured (%u), clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index a33df5f4c27a..eb5199102cfa 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -156,12 +156,10 @@ void __init smp_init_cpus(void) ncores = scu_base ? scu_get_core_count(scu_base) : 1; /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "U8500: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; } for (i = 0; i < ncores; i++) diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index bfd32f52c2db..2b1e836a76ed 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -221,6 +221,12 @@ static void ct_ca9x4_init_cpu_map(void) { int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + for (i = 0; i < ncores; ++i) set_cpu_possible(i, true); From 292b293ceef2eda1f96f0c90b96e954d7bdabd1c Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Wed, 20 Jul 2011 16:24:14 +0100 Subject: [PATCH 57/63] ARM: gic: consolidate PPI handling PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim Cc: David Brown Cc: Bryan Huntsman Cc: Tony Lindgren Cc: Paul Mundt Cc: Magnus Damm Cc: Thomas Gleixner Acked-by: David Brown Tested-by: David Brown Tested-by: Shawn Guo Signed-off-by: Marc Zyngier --- arch/arm/common/gic.c | 75 ++++++++++++++++++- arch/arm/include/asm/entry-macro-multi.S | 7 -- arch/arm/include/asm/hardirq.h | 3 - .../include/asm/hardware/entry-macro-gic.S | 19 +---- arch/arm/include/asm/localtimer.h | 11 +-- arch/arm/include/asm/smp.h | 5 -- arch/arm/kernel/irq.c | 3 - arch/arm/kernel/smp.c | 32 ++------ .../mach-exynos4/include/mach/entry-macro.S | 7 +- arch/arm/mach-msm/board-msm8x60.c | 11 --- .../mach-msm/include/mach/entry-macro-qgic.S | 73 +----------------- .../arm/mach-omap2/include/mach/entry-macro.S | 14 +--- arch/arm/mach-shmobile/entry-intc.S | 3 - .../mach-shmobile/include/mach/entry-macro.S | 3 - 14 files changed, 88 insertions(+), 178 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 666b278e56d7..bbea0168779b 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -28,10 +28,14 @@ #include #include #include +#include +#include +#include #include #include #include +#include static DEFINE_SPINLOCK(irq_controller_lock); @@ -255,6 +259,32 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) irq_set_chained_handler(irq, gic_handle_cascade_irq); } +#ifdef CONFIG_LOCAL_TIMERS +#define gic_ppi_handler percpu_timer_handler +#else +static irqreturn_t gic_ppi_handler(int irq, void *dev_id) +{ + return IRQ_NONE; +} +#endif + +#define PPI_IRQACT(nr) \ + { \ + .handler = gic_ppi_handler, \ + .flags = IRQF_PERCPU | IRQF_TIMER, \ + .irq = nr, \ + .name = "PPI-" # nr, \ + } + +static struct irqaction ppi_irqaction_template[16] __initdata = { + PPI_IRQACT(0), PPI_IRQACT(1), PPI_IRQACT(2), PPI_IRQACT(3), + PPI_IRQACT(4), PPI_IRQACT(5), PPI_IRQACT(6), PPI_IRQACT(7), + PPI_IRQACT(8), PPI_IRQACT(9), PPI_IRQACT(10), PPI_IRQACT(11), + PPI_IRQACT(12), PPI_IRQACT(13), PPI_IRQACT(14), PPI_IRQACT(15), +}; + +static struct irqaction *ppi_irqaction; + static void __init gic_dist_init(struct gic_chip_data *gic, unsigned int irq_start) { @@ -262,6 +292,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic, u32 cpumask; void __iomem *base = gic->dist_base; u32 cpu = 0; + u32 nrppis = 0, ppi_base = 0; #ifdef CONFIG_SMP cpu = cpu_logical_map(smp_processor_id()); @@ -282,6 +313,33 @@ static void __init gic_dist_init(struct gic_chip_data *gic, if (gic_irqs > 1020) gic_irqs = 1020; + /* + * Nobody would be insane enough to use PPIs on a secondary + * GIC, right? + */ + if (gic == &gic_data[0]) { + nrppis = (32 - irq_start) & 31; + + /* The GIC only supports up to 16 PPIs. */ + if (nrppis > 16) + BUG(); + + ppi_base = gic->irq_offset + 32 - nrppis; + + ppi_irqaction = kmemdup(&ppi_irqaction_template[16 - nrppis], + sizeof(*ppi_irqaction) * nrppis, + GFP_KERNEL); + + if (nrppis && !ppi_irqaction) { + pr_err("GIC: Can't allocate PPI memory"); + nrppis = 0; + ppi_base = 0; + } + } + + pr_info("Configuring GIC with %d sources (%d PPIs)\n", + gic_irqs, (gic == &gic_data[0]) ? nrppis : 0); + /* * Set all global interrupts to be level triggered, active low. */ @@ -317,7 +375,22 @@ static void __init gic_dist_init(struct gic_chip_data *gic, /* * Setup the Linux IRQ subsystem. */ - for (i = irq_start; i < irq_limit; i++) { + for (i = 0; i < nrppis; i++) { + int ppi = i + ppi_base; + int err; + + irq_set_percpu_devid(ppi); + irq_set_chip_and_handler(ppi, &gic_chip, + handle_percpu_devid_irq); + irq_set_chip_data(ppi, gic); + set_irq_flags(ppi, IRQF_VALID | IRQF_NOAUTOEN); + + err = setup_percpu_irq(ppi, &ppi_irqaction[i]); + if (err) + pr_err("GIC: can't setup PPI%d (%d)\n", ppi, err); + } + + for (i = irq_start + nrppis; i < irq_limit; i++) { irq_set_chip_and_handler(i, &gic_chip, handle_fasteoi_irq); irq_set_chip_data(i, gic); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S index 2f1e2098dfe7..88d61815f0c0 100644 --- a/arch/arm/include/asm/entry-macro-multi.S +++ b/arch/arm/include/asm/entry-macro-multi.S @@ -25,13 +25,6 @@ movne r1, sp adrne lr, BSYM(1b) bne do_IPI - -#ifdef CONFIG_LOCAL_TIMERS - test_for_ltirq r0, r2, r6, lr - movne r0, sp - adrne lr, BSYM(1b) - bne do_local_timer -#endif #endif 9997: .endm diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index 89ad1805e579..ddf07a92a6c8 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h @@ -9,9 +9,6 @@ typedef struct { unsigned int __softirq_pending; -#ifdef CONFIG_LOCAL_TIMERS - unsigned int local_timer_irqs; -#endif #ifdef CONFIG_SMP unsigned int ipi_irqs[NR_IPI]; #endif diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S index c115b82fe80a..74ebc803904d 100644 --- a/arch/arm/include/asm/hardware/entry-macro-gic.S +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S @@ -22,15 +22,11 @@ * interrupt controller spec. To wit: * * Interrupts 0-15 are IPI - * 16-28 are reserved - * 29-31 are local. We allow 30 to be used for the watchdog. + * 16-31 are local. We allow 30 to be used for the watchdog. * 32-1020 are global * 1021-1022 are reserved * 1023 is "spurious" (no interrupt) * - * For now, we ignore all local interrupts so only return an interrupt if it's - * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. - * * A simple read from the controller will tell us the number of the highest * priority enabled interrupt. We then just need to check whether it is in the * valid range for an IRQ (30-1020 inclusive). @@ -43,7 +39,7 @@ ldr \tmp, =1021 bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #29 + cmp \irqnr, #15 cmpcc \irqnr, \irqnr cmpne \irqnr, \tmp cmpcs \irqnr, \irqnr @@ -62,14 +58,3 @@ strcc \irqstat, [\base, #GIC_CPU_EOI] cmpcs \irqnr, \irqnr .endm - -/* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #29 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h index 3306f281333c..5c8acb4c4040 100644 --- a/arch/arm/include/asm/localtimer.h +++ b/arch/arm/include/asm/localtimer.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARM_LOCALTIMER_H #define __ASM_ARM_LOCALTIMER_H +#include + struct clock_event_device; /* @@ -18,14 +20,9 @@ struct clock_event_device; void percpu_timer_setup(void); /* - * Called from assembly, this is the local timer IRQ handler + * Per-cpu timer IRQ handler */ -asmlinkage void do_local_timer(struct pt_regs *); - -/* - * Called from C code - */ -void handle_local_timer(struct pt_regs *); +irqreturn_t percpu_timer_handler(int irq, void *dev_id); #ifdef CONFIG_LOCAL_TIMERS diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 0a17b62538c2..1e5717afc4ac 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -99,9 +99,4 @@ extern void platform_cpu_enable(unsigned int cpu); extern void arch_send_call_function_single_ipi(int cpu); extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); -/* - * show local interrupt info - */ -extern void show_local_irqs(struct seq_file *, int); - #endif /* ifndef __ASM_ARM_SMP_H */ diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 53919b230e8b..7cb29261249a 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -58,9 +58,6 @@ int arch_show_interrupts(struct seq_file *p, int prec) #endif #ifdef CONFIG_SMP show_ipi_list(p, prec); -#endif -#ifdef CONFIG_LOCAL_TIMERS - show_local_irqs(p, prec); #endif seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); return 0; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 35417d0fb8ab..917ed2fa4e4c 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -457,10 +457,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu) for (i = 0; i < NR_IPI; i++) sum += __get_irq_stat(cpu, ipi_irqs[i]); -#ifdef CONFIG_LOCAL_TIMERS - sum += __get_irq_stat(cpu, local_timer_irqs); -#endif - return sum; } @@ -478,34 +474,16 @@ static void ipi_timer(void) } #ifdef CONFIG_LOCAL_TIMERS -asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs) +irqreturn_t percpu_timer_handler(int irq, void *dev_id) { - handle_local_timer(regs); -} - -void handle_local_timer(struct pt_regs *regs) -{ - struct pt_regs *old_regs = set_irq_regs(regs); - int cpu = smp_processor_id(); + struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); if (local_timer_ack()) { - __inc_irq_stat(cpu, local_timer_irqs); - ipi_timer(); + evt->event_handler(evt); + return IRQ_HANDLED; } - set_irq_regs(old_regs); -} - -void show_local_irqs(struct seq_file *p, int prec) -{ - unsigned int cpu; - - seq_printf(p, "%*s: ", prec, "LOC"); - - for_each_present_cpu(cpu) - seq_printf(p, "%10u ", __get_irq_stat(cpu, local_timer_irqs)); - - seq_printf(p, " Local timer interrupts\n"); + return IRQ_NONE; } #endif diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S index d7a1e281ce7a..006a4f4c65c6 100644 --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S @@ -55,7 +55,7 @@ bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #29 + cmp \irqnr, #15 cmpcc \irqnr, \irqnr cmpne \irqnr, \tmp cmpcs \irqnr, \irqnr @@ -76,8 +76,3 @@ strcc \irqstat, [\base, #GIC_CPU_EOI] cmpcs \irqnr, \irqnr .endm - - /* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - .endm diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 1163b6fd05d2..d70a2f643613 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -36,8 +36,6 @@ static void __init msm8x60_map_io(void) static void __init msm8x60_init_irq(void) { - unsigned int i; - gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, (void *)MSM_QGIC_CPU_BASE); @@ -49,15 +47,6 @@ static void __init msm8x60_init_irq(void) */ if (!machine_is_msm8x60_sim()) writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET); - - /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet - * as they are configured as level, which does not play nice with - * handle_percpu_irq. - */ - for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { - if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) - irq_set_handler(i, handle_percpu_irq); - } } static void __init msm8x60_init(void) diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S index 12467157afb9..717076f3ca73 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S +++ b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S @@ -8,81 +8,10 @@ * warranty of any kind, whether express or implied. */ -#include -#include +#include .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm - - /* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: - * - * Migrated the code from ARM MP port to be more consistent - * with interrupt processing , the following still holds true - * however, all interrupts are treated the same regardless of - * if they are local IPI or PPI - * - * Interrupts 0-15 are IPI - * 16-31 are PPI - * (16-18 are the timers) - * 32-1020 are global - * 1021-1022 are reserved - * 1023 is "spurious" (no interrupt) - * - * A simple read from the controller will tell us the number of the - * highest priority enabled interrupt. We then just need to check - * whether it is in the valid range for an IRQ (0-1020 inclusive). - * - * Base ARM code assumes that the local (private) peripheral interrupts - * are not valid, we treat them differently, in that the privates are - * handled like normal shared interrupts with the exception that only - * one processor can register the interrupt and the handler must be - * the same for all processors. - */ - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 =srcCPU, - 9-0 =int # */ - - bic \irqnr, \irqstat, #0x1c00 @mask src - cmp \irqnr, #15 - ldr \tmp, =1021 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr - - .endm - - /* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt on the - * controller, since this requires the original irqstat value which - * we won't easily be able to recreate later. - */ - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - strcc \irqstat, [\base, #GIC_CPU_EOI] - cmpcs \irqnr, \irqnr - .endm - - /* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #16 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index ceb8b7e593d7..feb90a10945a 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -78,7 +78,7 @@ 4401: ldr \irqstat, [\base, #GIC_CPU_INTACK] ldr \tmp, =1021 bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #29 + cmp \irqnr, #15 cmpcc \irqnr, \irqnr cmpne \irqnr, \tmp cmpcs \irqnr, \irqnr @@ -101,18 +101,6 @@ it cs cmpcs \irqnr, \irqnr .endm - - /* As above, this assumes that irqstat and base are preserved */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #29 - itt eq - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm #endif /* CONFIG_SMP */ #else /* MULTI_OMAP2 */ diff --git a/arch/arm/mach-shmobile/entry-intc.S b/arch/arm/mach-shmobile/entry-intc.S index cac0a7ae2084..1a1c00ca39a2 100644 --- a/arch/arm/mach-shmobile/entry-intc.S +++ b/arch/arm/mach-shmobile/entry-intc.S @@ -51,7 +51,4 @@ .macro test_for_ipi, irqnr, irqstat, base, tmp .endm - .macro test_for_ltirq, irqnr, irqstat, base, tmp - .endm - arch_irq_handler shmobile_handle_irq_intc diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S index d791f10eeac7..8d4a416d4285 100644 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S @@ -27,8 +27,5 @@ .macro test_for_ipi, irqnr, irqstat, base, tmp .endm - .macro test_for_ltirq, irqnr, irqstat, base, tmp - .endm - .macro arch_ret_to_user, tmp1, tmp2 .endm From 28af690a284dfcb627bd69d0963db1c0f412cb8c Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 22 Jul 2011 12:52:37 +0100 Subject: [PATCH 58/63] ARM: gic, local timers: use the request_percpu_irq() interface This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown Cc: Thomas Gleixner Acked-by: David Brown Tested-by: David Brown Tested-by: Shawn Guo Signed-off-by: Marc Zyngier --- arch/arm/common/gic.c | 52 ---------------------- arch/arm/include/asm/hardware/gic.h | 1 - arch/arm/include/asm/localtimer.h | 16 +++---- arch/arm/include/asm/smp_twd.h | 2 +- arch/arm/kernel/smp.c | 16 +------ arch/arm/kernel/smp_twd.c | 47 +++++++++++++++++++- arch/arm/mach-exynos4/mct.c | 7 ++- arch/arm/mach-msm/timer.c | 69 +++++++++++++++++------------ 8 files changed, 99 insertions(+), 111 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index bbea0168779b..a2b320503931 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -35,7 +35,6 @@ #include #include #include -#include static DEFINE_SPINLOCK(irq_controller_lock); @@ -259,32 +258,6 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) irq_set_chained_handler(irq, gic_handle_cascade_irq); } -#ifdef CONFIG_LOCAL_TIMERS -#define gic_ppi_handler percpu_timer_handler -#else -static irqreturn_t gic_ppi_handler(int irq, void *dev_id) -{ - return IRQ_NONE; -} -#endif - -#define PPI_IRQACT(nr) \ - { \ - .handler = gic_ppi_handler, \ - .flags = IRQF_PERCPU | IRQF_TIMER, \ - .irq = nr, \ - .name = "PPI-" # nr, \ - } - -static struct irqaction ppi_irqaction_template[16] __initdata = { - PPI_IRQACT(0), PPI_IRQACT(1), PPI_IRQACT(2), PPI_IRQACT(3), - PPI_IRQACT(4), PPI_IRQACT(5), PPI_IRQACT(6), PPI_IRQACT(7), - PPI_IRQACT(8), PPI_IRQACT(9), PPI_IRQACT(10), PPI_IRQACT(11), - PPI_IRQACT(12), PPI_IRQACT(13), PPI_IRQACT(14), PPI_IRQACT(15), -}; - -static struct irqaction *ppi_irqaction; - static void __init gic_dist_init(struct gic_chip_data *gic, unsigned int irq_start) { @@ -325,16 +298,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic, BUG(); ppi_base = gic->irq_offset + 32 - nrppis; - - ppi_irqaction = kmemdup(&ppi_irqaction_template[16 - nrppis], - sizeof(*ppi_irqaction) * nrppis, - GFP_KERNEL); - - if (nrppis && !ppi_irqaction) { - pr_err("GIC: Can't allocate PPI memory"); - nrppis = 0; - ppi_base = 0; - } } pr_info("Configuring GIC with %d sources (%d PPIs)\n", @@ -377,17 +340,12 @@ static void __init gic_dist_init(struct gic_chip_data *gic, */ for (i = 0; i < nrppis; i++) { int ppi = i + ppi_base; - int err; irq_set_percpu_devid(ppi); irq_set_chip_and_handler(ppi, &gic_chip, handle_percpu_devid_irq); irq_set_chip_data(ppi, gic); set_irq_flags(ppi, IRQF_VALID | IRQF_NOAUTOEN); - - err = setup_percpu_irq(ppi, &ppi_irqaction[i]); - if (err) - pr_err("GIC: can't setup PPI%d (%d)\n", ppi, err); } for (i = irq_start + nrppis; i < irq_limit; i++) { @@ -448,16 +406,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr) gic_cpu_init(&gic_data[gic_nr]); } -void __cpuinit gic_enable_ppi(unsigned int irq) -{ - unsigned long flags; - - local_irq_save(flags); - irq_set_status_flags(irq, IRQ_NOPROBE); - gic_unmask_irq(irq_get_irq_data(irq)); - local_irq_restore(flags); -} - #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 435d3f86c708..2dadd50a77d2 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -40,7 +40,6 @@ void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); void gic_secondary_init(unsigned int); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); -void gic_enable_ppi(unsigned int); struct gic_chip_data { unsigned int irq_offset; diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h index 5c8acb4c4040..f5e1cec7e35c 100644 --- a/arch/arm/include/asm/localtimer.h +++ b/arch/arm/include/asm/localtimer.h @@ -19,26 +19,20 @@ struct clock_event_device; */ void percpu_timer_setup(void); -/* - * Per-cpu timer IRQ handler - */ -irqreturn_t percpu_timer_handler(int irq, void *dev_id); - #ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_HAVE_ARM_TWD #include "smp_twd.h" -#define local_timer_ack() twd_timer_ack() +#define local_timer_stop(c) twd_timer_stop((c)) #else /* - * Platform provides this to acknowledge a local timer IRQ. - * Returns true if the local timer IRQ is to be processed. + * Stop the local timer */ -int local_timer_ack(void); +void local_timer_stop(struct clock_event_device *); #endif @@ -53,6 +47,10 @@ static inline int local_timer_setup(struct clock_event_device *evt) { return -ENXIO; } + +static inline void local_timer_stop(struct clock_event_device *evt) +{ +} #endif #endif diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h index fed9981fba08..ef9ffba97ad8 100644 --- a/arch/arm/include/asm/smp_twd.h +++ b/arch/arm/include/asm/smp_twd.h @@ -22,7 +22,7 @@ struct clock_event_device; extern void __iomem *twd_base; -int twd_timer_ack(void); void twd_timer_setup(struct clock_event_device *); +void twd_timer_stop(struct clock_event_device *); #endif diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 917ed2fa4e4c..a96c08cd6125 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -473,20 +473,6 @@ static void ipi_timer(void) irq_exit(); } -#ifdef CONFIG_LOCAL_TIMERS -irqreturn_t percpu_timer_handler(int irq, void *dev_id) -{ - struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); - - if (local_timer_ack()) { - evt->event_handler(evt); - return IRQ_HANDLED; - } - - return IRQ_NONE; -} -#endif - #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST static void smp_timer_broadcast(const struct cpumask *mask) { @@ -537,7 +523,7 @@ static void percpu_timer_stop(void) unsigned int cpu = smp_processor_id(); struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); - evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); + local_timer_stop(evt); } #endif diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 01c186222f3b..a8a6682d6b52 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -19,6 +19,7 @@ #include #include +#include #include /* set up by the platform code */ @@ -26,6 +27,8 @@ void __iomem *twd_base; static unsigned long twd_timer_rate; +static struct clock_event_device __percpu **twd_evt; + static void twd_set_mode(enum clock_event_mode mode, struct clock_event_device *clk) { @@ -80,6 +83,12 @@ int twd_timer_ack(void) return 0; } +void twd_timer_stop(struct clock_event_device *clk) +{ + twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk); + disable_percpu_irq(clk->irq); +} + static void __cpuinit twd_calibrate_rate(void) { unsigned long count; @@ -119,11 +128,43 @@ static void __cpuinit twd_calibrate_rate(void) } } +static irqreturn_t twd_handler(int irq, void *dev_id) +{ + struct clock_event_device *evt = *(struct clock_event_device **)dev_id; + + if (twd_timer_ack()) { + evt->event_handler(evt); + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + /* * Setup the local clock events for a CPU. */ void __cpuinit twd_timer_setup(struct clock_event_device *clk) { + struct clock_event_device **this_cpu_clk; + + if (!twd_evt) { + int err; + + twd_evt = alloc_percpu(struct clock_event_device *); + if (!twd_evt) { + pr_err("twd: can't allocate memory\n"); + return; + } + + err = request_percpu_irq(clk->irq, twd_handler, + "twd", twd_evt); + if (err) { + pr_err("twd: can't register interrupt %d (%d)\n", + clk->irq, err); + return; + } + } + twd_calibrate_rate(); clk->name = "local_timer"; @@ -137,8 +178,10 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); clk->min_delta_ns = clockevent_delta2ns(0xf, clk); + this_cpu_clk = __this_cpu_ptr(twd_evt); + *this_cpu_clk = clk; + clockevents_register_device(clk); - /* Make sure our local interrupt controller has this enabled */ - gic_enable_ppi(clk->irq); + enable_percpu_irq(clk->irq, 0); } diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c index 1ae059b7ad7b..85a1bb79f11c 100644 --- a/arch/arm/mach-exynos4/mct.c +++ b/arch/arm/mach-exynos4/mct.c @@ -380,9 +380,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt) if (cpu == 0) { mct_tick0_event_irq.dev_id = &mct_tick[cpu]; + evt->irq = IRQ_MCT_L0; setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq); } else { mct_tick1_event_irq.dev_id = &mct_tick[cpu]; + evt->irq = IRQ_MCT_L1; setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq); irq_set_affinity(IRQ_MCT_L1, cpumask_of(1)); } @@ -394,9 +396,10 @@ void __cpuinit local_timer_setup(struct clock_event_device *evt) exynos4_mct_tick_init(evt); } -int local_timer_ack(void) +void local_timer_stop(struct clock_event_device *evt) { - return 0; + evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); + disable_irq(evt->irq); } #endif /* CONFIG_LOCAL_TIMERS */ diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 63621f152c98..afeeca52fc66 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -71,12 +71,16 @@ enum timer_location { struct msm_clock { struct clock_event_device clockevent; struct clocksource clocksource; - struct irqaction irq; + unsigned int irq; void __iomem *regbase; uint32_t freq; uint32_t shift; void __iomem *global_counter; void __iomem *local_counter; + union { + struct clock_event_device *evt; + struct clock_event_device __percpu **percpu_evt; + }; }; enum { @@ -87,13 +91,10 @@ enum { static struct msm_clock msm_clocks[]; -static struct clock_event_device *local_clock_event; static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) { - struct clock_event_device *evt = dev_id; - if (smp_processor_id() != 0) - evt = local_clock_event; + struct clock_event_device *evt = *(struct clock_event_device **)dev_id; if (evt->event_handler == NULL) return IRQ_HANDLED; evt->event_handler(evt); @@ -171,13 +172,7 @@ static struct msm_clock msm_clocks[] = { .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }, - .irq = { - .name = "gp_timer", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, - .handler = msm_timer_interrupt, - .dev_id = &msm_clocks[0].clockevent, - .irq = INT_GP_TIMER_EXP - }, + .irq = INT_GP_TIMER_EXP, .freq = GPT_HZ, }, [MSM_CLOCK_DGT] = { @@ -196,13 +191,7 @@ static struct msm_clock msm_clocks[] = { .mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }, - .irq = { - .name = "dg_timer", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, - .handler = msm_timer_interrupt, - .dev_id = &msm_clocks[1].clockevent, - .irq = INT_DEBUG_TIMER_EXP - }, + .irq = INT_DEBUG_TIMER_EXP, .freq = DGT_HZ >> MSM_DGT_SHIFT, .shift = MSM_DGT_SHIFT, } @@ -261,10 +250,30 @@ static void __init msm_timer_init(void) printk(KERN_ERR "msm_timer_init: clocksource_register " "failed for %s\n", cs->name); - res = setup_irq(clock->irq.irq, &clock->irq); + ce->irq = clock->irq; + if (cpu_is_msm8x60() || cpu_is_msm8960()) { + clock->percpu_evt = alloc_percpu(struct clock_event_device *); + if (!clock->percpu_evt) { + pr_err("msm_timer_init: memory allocation " + "failed for %s\n", ce->name); + continue; + } + + *__this_cpu_ptr(clock->percpu_evt) = ce; + res = request_percpu_irq(ce->irq, msm_timer_interrupt, + ce->name, clock->percpu_evt); + if (!res) + enable_percpu_irq(ce->irq, 0); + } else { + clock->evt = ce; + res = request_irq(ce->irq, msm_timer_interrupt, + IRQF_TIMER | IRQF_NOBALANCING | IRQF_TRIGGER_RISING, + ce->name, &clock->evt); + } + if (res) - printk(KERN_ERR "msm_timer_init: setup_irq " - "failed for %s\n", cs->name); + pr_err("msm_timer_init: request_irq failed for %s\n", + ce->name); clockevents_register_device(ce); } @@ -273,6 +282,7 @@ static void __init msm_timer_init(void) #ifdef CONFIG_SMP int __cpuinit local_timer_setup(struct clock_event_device *evt) { + static bool local_timer_inited; struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; /* Use existing clock_event for cpu 0 */ @@ -281,12 +291,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); - if (!local_clock_event) { + if (!local_timer_inited) { writel(0, clock->regbase + TIMER_ENABLE); writel(0, clock->regbase + TIMER_CLEAR); writel(~0, clock->regbase + TIMER_MATCH_VAL); + local_timer_inited = true; } - evt->irq = clock->irq.irq; + evt->irq = clock->irq; evt->name = "local_timer"; evt->features = CLOCK_EVT_FEAT_ONESHOT; evt->rating = clock->clockevent.rating; @@ -298,17 +309,17 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) clockevent_delta2ns(0xf0000000 >> clock->shift, evt); evt->min_delta_ns = clockevent_delta2ns(4, evt); - local_clock_event = evt; - - gic_enable_ppi(clock->irq.irq); + *__this_cpu_ptr(clock->percpu_evt) = evt; + enable_percpu_irq(evt->irq, 0); clockevents_register_device(evt); return 0; } -inline int local_timer_ack(void) +void local_timer_stop(struct clock_event_device *evt) { - return 1; + evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); + disable_percpu_irq(evt->irq); } #endif From c71a54b0820179e53483d5220cdef1a0df8d5bd1 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 20 Sep 2011 15:13:50 -0500 Subject: [PATCH 59/63] of/irq: introduce of_irq_init of_irq_init will scan the devicetree for matching interrupt controller nodes. Then it calls an initialization function for each found controller in the proper order with parent nodes initialized before child nodes. Based on initial pseudo code from Grant Likely. Changes in v4: - Drop unnecessary empty list check - Be more verbose on errors - Simplify "if (!desc) WARN_ON(1)" to "if (WARN_ON(!desc))" Changes in v3: - add missing kfree's found by Jamie - Implement Grant's comments to simplify the init loop - fix function comments Changes in v2: - Complete re-write of list searching code from Grant Likely Signed-off-by: Rob Herring Reviewed-by: Jamie Iles Tested-by: Thomas Abraham Acked-by: Grant Likely --- drivers/of/irq.c | 107 +++++++++++++++++++++++++++++++++++++++++ include/linux/of_irq.h | 3 ++ 2 files changed, 110 insertions(+) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 9f689f1da0fc..791270b8bd1c 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -19,10 +19,12 @@ */ #include +#include #include #include #include #include +#include /* For archs that don't support NO_IRQ (such as x86), provide a dummy value */ #ifndef NO_IRQ @@ -386,3 +388,108 @@ int of_irq_to_resource_table(struct device_node *dev, struct resource *res, return i; } + +struct intc_desc { + struct list_head list; + struct device_node *dev; + struct device_node *interrupt_parent; +}; + +/** + * of_irq_init - Scan and init matching interrupt controllers in DT + * @matches: 0 terminated array of nodes to match and init function to call + * + * This function scans the device tree for matching interrupt controller nodes, + * and calls their initialization functions in order with parents first. + */ +void __init of_irq_init(const struct of_device_id *matches) +{ + struct device_node *np, *parent = NULL; + struct intc_desc *desc, *temp_desc; + struct list_head intc_desc_list, intc_parent_list; + + INIT_LIST_HEAD(&intc_desc_list); + INIT_LIST_HEAD(&intc_parent_list); + + for_each_matching_node(np, matches) { + if (!of_find_property(np, "interrupt-controller", NULL)) + continue; + /* + * Here, we allocate and populate an intc_desc with the node + * pointer, interrupt-parent device_node etc. + */ + desc = kzalloc(sizeof(*desc), GFP_KERNEL); + if (WARN_ON(!desc)) + goto err; + + desc->dev = np; + desc->interrupt_parent = of_irq_find_parent(np); + list_add_tail(&desc->list, &intc_desc_list); + } + + /* + * The root irq controller is the one without an interrupt-parent. + * That one goes first, followed by the controllers that reference it, + * followed by the ones that reference the 2nd level controllers, etc. + */ + while (!list_empty(&intc_desc_list)) { + /* + * Process all controllers with the current 'parent'. + * First pass will be looking for NULL as the parent. + * The assumption is that NULL parent means a root controller. + */ + list_for_each_entry_safe(desc, temp_desc, &intc_desc_list, list) { + const struct of_device_id *match; + int ret; + of_irq_init_cb_t irq_init_cb; + + if (desc->interrupt_parent != parent) + continue; + + list_del(&desc->list); + match = of_match_node(matches, desc->dev); + if (WARN(!match->data, + "of_irq_init: no init function for %s\n", + match->compatible)) { + kfree(desc); + continue; + } + + pr_debug("of_irq_init: init %s @ %p, parent %p\n", + match->compatible, + desc->dev, desc->interrupt_parent); + irq_init_cb = match->data; + ret = irq_init_cb(desc->dev, desc->interrupt_parent); + if (ret) { + kfree(desc); + continue; + } + + /* + * This one is now set up; add it to the parent list so + * its children can get processed in a subsequent pass. + */ + list_add_tail(&desc->list, &intc_parent_list); + } + + /* Get the next pending parent that might have children */ + desc = list_first_entry(&intc_parent_list, typeof(*desc), list); + if (list_empty(&intc_parent_list) || !desc) { + pr_err("of_irq_init: children remain, but no parents\n"); + break; + } + list_del(&desc->list); + parent = desc->dev; + kfree(desc); + } + + list_for_each_entry_safe(desc, temp_desc, &intc_parent_list, list) { + list_del(&desc->list); + kfree(desc); + } +err: + list_for_each_entry_safe(desc, temp_desc, &intc_desc_list, list) { + list_del(&desc->list); + kfree(desc); + } +} diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index cd2e61ce4e83..d0307eed20c9 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -33,6 +33,8 @@ struct of_irq { u32 specifier[OF_MAX_IRQ_SPEC]; /* Specifier copy */ }; +typedef int (*of_irq_init_cb_t)(struct device_node *, struct device_node *); + /* * Workarounds only applied to 32bit powermac machines */ @@ -73,6 +75,7 @@ extern int of_irq_to_resource_table(struct device_node *dev, struct resource *res, int nr_irqs); extern struct device_node *of_irq_find_parent(struct device_node *child); +extern void of_irq_init(const struct of_device_id *matches); #endif /* CONFIG_OF_IRQ */ #endif /* CONFIG_OF */ From 6d274309d0e64bdbdb6c50945ca2964596e8fa5a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 30 Sep 2011 10:48:38 -0500 Subject: [PATCH 60/63] irq: support domains with non-zero hwirq base Interrupt controllers can have non-zero starting value for h/w irq numbers. Adding support in irq_domain allows the domain hwirq numbering to match the interrupt controllers' numbering. As this makes looping over irqs for a domain more complicated, add loop iterators to iterate over all hwirqs and irqs for a domain. Signed-off-by: Rob Herring Reviewed-by: Jamie Iles Tested-by: Thomas Abraham Acked-by: Grant Likely Acked-by: Thomas Gleixner --- include/linux/irqdomain.h | 16 +++++++++++++++- kernel/irq/irqdomain.c | 12 ++++++------ 2 files changed, 21 insertions(+), 7 deletions(-) diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 3ad553e8eae2..99834e581b9e 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -47,6 +47,7 @@ struct irq_domain_ops { * of the irq_domain is responsible for allocating the array of * irq_desc structures. * @nr_irq: Number of irqs managed by the irq domain + * @hwirq_base: Starting number for hwirqs managed by the irq domain * @ops: pointer to irq_domain methods * @priv: private data pointer for use by owner. Not touched by irq_domain * core code. @@ -57,6 +58,7 @@ struct irq_domain { struct list_head list; unsigned int irq_base; unsigned int nr_irq; + unsigned int hwirq_base; const struct irq_domain_ops *ops; void *priv; struct device_node *of_node; @@ -72,9 +74,21 @@ struct irq_domain { static inline unsigned int irq_domain_to_irq(struct irq_domain *d, unsigned long hwirq) { - return d->ops->to_irq ? d->ops->to_irq(d, hwirq) : d->irq_base + hwirq; + if (d->ops->to_irq) + return d->ops->to_irq(d, hwirq); + if (WARN_ON(hwirq < d->hwirq_base)) + return 0; + return d->irq_base + hwirq - d->hwirq_base; } +#define irq_domain_for_each_hwirq(d, hw) \ + for (hw = d->hwirq_base; hw < d->hwirq_base + d->nr_irq; hw++) + +#define irq_domain_for_each_irq(d, hw, irq) \ + for (hw = d->hwirq_base, irq = irq_domain_to_irq(d, hw); \ + hw < d->hwirq_base + d->nr_irq; \ + hw++, irq = irq_domain_to_irq(d, hw)) + extern void irq_domain_add(struct irq_domain *domain); extern void irq_domain_del(struct irq_domain *domain); #endif /* CONFIG_IRQ_DOMAIN */ diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index b57a3776de44..200ce832c585 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -20,15 +20,15 @@ static DEFINE_MUTEX(irq_domain_mutex); void irq_domain_add(struct irq_domain *domain) { struct irq_data *d; - int hwirq; + int hwirq, irq; /* * This assumes that the irq_domain owner has already allocated * the irq_descs. This block will be removed when support for dynamic * allocation of irq_descs is added to irq_domain. */ - for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) { - d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq)); + irq_domain_for_each_irq(domain, hwirq, irq) { + d = irq_get_irq_data(irq); if (!d) { WARN(1, "error: assigning domain to non existant irq_desc"); return; @@ -54,15 +54,15 @@ void irq_domain_add(struct irq_domain *domain) void irq_domain_del(struct irq_domain *domain) { struct irq_data *d; - int hwirq; + int hwirq, irq; mutex_lock(&irq_domain_mutex); list_del(&domain->list); mutex_unlock(&irq_domain_mutex); /* Clear the irq_domain assignments */ - for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) { - d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq)); + irq_domain_for_each_irq(domain, hwirq, irq) { + d = irq_get_irq_data(irq); d->domain = NULL; } } From 4294f8baaf174c9aa57886e7ed27caf4b02578f6 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 28 Sep 2011 21:25:31 -0500 Subject: [PATCH 61/63] ARM: gic: add irq_domain support Convert the gic interrupt controller to use irq domains in preparation for device-tree binding and MULTI_IRQ. This allows for translation between GIC interrupt IDs and Linux irq numbers. The meaning of irq_offset has changed. It now is just the number of skipped GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32 for secondary GICs. Signed-off-by: Rob Herring Cc: Marc Zyngier Reviewed-by: Jamie Iles Tested-by: Thomas Abraham Acked-by: Grant Likely --- arch/arm/common/Kconfig | 1 + arch/arm/common/gic.c | 118 +++++++++++++--------------- arch/arm/include/asm/hardware/gic.h | 7 +- 3 files changed, 63 insertions(+), 63 deletions(-) diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 4b71766fb21d..74df9ca2be31 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -1,4 +1,5 @@ config ARM_GIC + select IRQ_DOMAIN bool config ARM_VIC diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 016c1aeb847c..ccaa1ab18de7 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -24,11 +24,13 @@ */ #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -75,8 +77,7 @@ static inline void __iomem *gic_cpu_base(struct irq_data *d) static inline unsigned int gic_irq(struct irq_data *d) { - struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); - return d->irq - gic_data->irq_offset; + return d->hwirq; } /* @@ -84,7 +85,7 @@ static inline unsigned int gic_irq(struct irq_data *d) */ static void gic_mask_irq(struct irq_data *d) { - u32 mask = 1 << (d->irq % 32); + u32 mask = 1 << (gic_irq(d) % 32); spin_lock(&irq_controller_lock); writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); @@ -95,7 +96,7 @@ static void gic_mask_irq(struct irq_data *d) static void gic_unmask_irq(struct irq_data *d) { - u32 mask = 1 << (d->irq % 32); + u32 mask = 1 << (gic_irq(d) % 32); spin_lock(&irq_controller_lock); if (gic_arch_extn.irq_unmask) @@ -176,7 +177,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); - unsigned int shift = (d->irq % 4) * 8; + unsigned int shift = (gic_irq(d) % 4) * 8; unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); u32 val, mask, bit; @@ -227,7 +228,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) if (gic_irq == 1023) goto out; - cascade_irq = gic_irq + chip_data->irq_offset; + cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq); if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) do_bad_IRQ(cascade_irq, desc); else @@ -259,14 +260,14 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) irq_set_chained_handler(irq, gic_handle_cascade_irq); } -static void __init gic_dist_init(struct gic_chip_data *gic, - unsigned int irq_start) +static void __init gic_dist_init(struct gic_chip_data *gic) { - unsigned int gic_irqs, irq_limit, i; + unsigned int i, irq; u32 cpumask; + unsigned int gic_irqs = gic->gic_irqs; + struct irq_domain *domain = &gic->domain; void __iomem *base = gic->dist_base; u32 cpu = 0; - u32 nrppis = 0, ppi_base = 0; #ifdef CONFIG_SMP cpu = cpu_logical_map(smp_processor_id()); @@ -278,34 +279,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic, writel_relaxed(0, base + GIC_DIST_CTRL); - /* - * Find out how many interrupts are supported. - * The GIC only supports up to 1020 interrupt sources. - */ - gic_irqs = readl_relaxed(base + GIC_DIST_CTR) & 0x1f; - gic_irqs = (gic_irqs + 1) * 32; - if (gic_irqs > 1020) - gic_irqs = 1020; - - gic->gic_irqs = gic_irqs; - - /* - * Nobody would be insane enough to use PPIs on a secondary - * GIC, right? - */ - if (gic == &gic_data[0]) { - nrppis = (32 - irq_start) & 31; - - /* The GIC only supports up to 16 PPIs. */ - if (nrppis > 16) - BUG(); - - ppi_base = gic->irq_offset + 32 - nrppis; - } - - pr_info("Configuring GIC with %d sources (%d PPIs)\n", - gic_irqs, (gic == &gic_data[0]) ? nrppis : 0); - /* * Set all global interrupts to be level triggered, active low. */ @@ -331,30 +304,21 @@ static void __init gic_dist_init(struct gic_chip_data *gic, for (i = 32; i < gic_irqs; i += 32) writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); - /* - * Limit number of interrupts registered to the platform maximum - */ - irq_limit = gic->irq_offset + gic_irqs; - if (WARN_ON(irq_limit > NR_IRQS)) - irq_limit = NR_IRQS; - /* * Setup the Linux IRQ subsystem. */ - for (i = 0; i < nrppis; i++) { - int ppi = i + ppi_base; - - irq_set_percpu_devid(ppi); - irq_set_chip_and_handler(ppi, &gic_chip, - handle_percpu_devid_irq); - irq_set_chip_data(ppi, gic); - set_irq_flags(ppi, IRQF_VALID | IRQF_NOAUTOEN); - } - - for (i = irq_start + nrppis; i < irq_limit; i++) { - irq_set_chip_and_handler(i, &gic_chip, handle_fasteoi_irq); - irq_set_chip_data(i, gic); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + irq_domain_for_each_irq(domain, i, irq) { + if (i < 32) { + irq_set_percpu_devid(irq); + irq_set_chip_and_handler(irq, &gic_chip, + handle_percpu_devid_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); + } else { + irq_set_chip_and_handler(irq, &gic_chip, + handle_fasteoi_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + irq_set_chip_data(irq, gic); } writel_relaxed(1, base + GIC_DIST_CTRL); @@ -566,23 +530,53 @@ static void __init gic_pm_init(struct gic_chip_data *gic) } #endif +const struct irq_domain_ops gic_irq_domain_ops = { +}; + void __init gic_init(unsigned int gic_nr, unsigned int irq_start, void __iomem *dist_base, void __iomem *cpu_base) { struct gic_chip_data *gic; + struct irq_domain *domain; + int gic_irqs; BUG_ON(gic_nr >= MAX_GIC_NR); gic = &gic_data[gic_nr]; + domain = &gic->domain; gic->dist_base = dist_base; gic->cpu_base = cpu_base; - gic->irq_offset = (irq_start - 1) & ~31; - if (gic_nr == 0) + /* + * For primary GICs, skip over SGIs. + * For secondary GICs, skip over PPIs, too. + */ + if (gic_nr == 0) { gic_cpu_base_addr = cpu_base; + domain->hwirq_base = 16; + irq_start = (irq_start & ~31) + 16; + } else + domain->hwirq_base = 32; + + /* + * Find out how many interrupts are supported. + * The GIC only supports up to 1020 interrupt sources. + */ + gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; + gic_irqs = (gic_irqs + 1) * 32; + if (gic_irqs > 1020) + gic_irqs = 1020; + gic->gic_irqs = gic_irqs; + + domain->nr_irq = gic_irqs - domain->hwirq_base; + domain->irq_base = irq_alloc_descs(-1, irq_start, domain->nr_irq, + numa_node_id()); + domain->priv = gic; + domain->ops = &gic_irq_domain_ops; + irq_domain_add(domain); gic_chip.flags |= gic_arch_extn.flags; - gic_dist_init(gic, irq_start); + gic_dist_init(gic); gic_cpu_init(gic); gic_pm_init(gic); } diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 14867e12f205..43a05d90e43b 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -33,6 +33,9 @@ #define GIC_DIST_SOFTINT 0xf00 #ifndef __ASSEMBLY__ +#include +struct device_node; + extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; @@ -42,7 +45,6 @@ void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); struct gic_chip_data { - unsigned int irq_offset; void __iomem *dist_base; void __iomem *cpu_base; #ifdef CONFIG_CPU_PM @@ -51,6 +53,9 @@ struct gic_chip_data { u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; u32 __percpu *saved_ppi_enable; u32 __percpu *saved_ppi_conf; +#endif +#ifdef CONFIG_IRQ_DOMAIN + struct irq_domain domain; #endif unsigned int gic_irqs; }; From b3f7ed0324091e2cb23fe1b3c10570700f614014 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 28 Sep 2011 21:27:52 -0500 Subject: [PATCH 62/63] ARM: gic: add OF based initialization This adds ARM gic interrupt controller initialization using device tree data. The initialization function is intended to be called by of_irq_init function like this: const static struct of_device_id irq_match[] = { { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, {} }; static void __init init_irqs(void) { of_irq_init(irq_match); } Signed-off-by: Rob Herring Reviewed-by: Jamie Iles Tested-by: Thomas Abraham Acked-by: Grant Likely --- Documentation/devicetree/bindings/arm/gic.txt | 55 +++++++++++++++++ arch/arm/common/gic.c | 61 +++++++++++++++++++ arch/arm/include/asm/hardware/gic.h | 1 + 3 files changed, 117 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/gic.txt diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt new file mode 100644 index 000000000000..52916b4aa1fe --- /dev/null +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -0,0 +1,55 @@ +* ARM Generic Interrupt Controller + +ARM SMP cores are often associated with a GIC, providing per processor +interrupts (PPI), shared processor interrupts (SPI) and software +generated interrupts (SGI). + +Primary GIC is attached directly to the CPU and typically has PPIs and SGIs. +Secondary GICs are cascaded into the upward interrupt controller and do not +have PPIs or SGIs. + +Main node required properties: + +- compatible : should be one of: + "arm,cortex-a9-gic" + "arm,arm11mp-gic" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a and the value shall be 3. + + The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI + interrupts. + + The 2nd cell contains the interrupt number for the interrupt type. + SPI interrupts are in the range [0-987]. PPI interrupts are in the + range [0-15]. + + The 3rd cell is the flags, encoded as follows: + bits[3:0] trigger type and level flags. + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of + the 8 possible cpus attached to the GIC. A bit set to '1' indicated + the interrupt is wired to that CPU. Only valid for PPI interrupts. + +- reg : Specifies base physical address(s) and size of the GIC registers. The + first region is the GIC distributor register base and size. The 2nd region is + the GIC cpu interface register base and size. + +Optional +- interrupts : Interrupt source of the parent interrupt controller. Only + present on secondary GICs. + +Example: + + intc: interrupt-controller@fff11000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + reg = <0xfff11000 0x1000>, + <0xfff10100 0x100>; + }; + diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index ccaa1ab18de7..1333e68b1f96 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -30,6 +30,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -530,7 +533,33 @@ static void __init gic_pm_init(struct gic_chip_data *gic) } #endif +#ifdef CONFIG_OF +static int gic_irq_domain_dt_translate(struct irq_domain *d, + struct device_node *controller, + const u32 *intspec, unsigned int intsize, + unsigned long *out_hwirq, unsigned int *out_type) +{ + if (d->of_node != controller) + return -EINVAL; + if (intsize < 3) + return -EINVAL; + + /* Get the interrupt number and add 16 to skip over SGIs */ + *out_hwirq = intspec[1] + 16; + + /* For SPIs, we need to add 16 more to get the GIC irq ID number */ + if (!intspec[0]) + *out_hwirq += 16; + + *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; + return 0; +} +#endif + const struct irq_domain_ops gic_irq_domain_ops = { +#ifdef CONFIG_OF + .dt_translate = gic_irq_domain_dt_translate, +#endif }; void __init gic_init(unsigned int gic_nr, unsigned int irq_start, @@ -608,3 +637,35 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); } #endif + +#ifdef CONFIG_OF +static int gic_cnt __initdata = 0; + +int __init gic_of_init(struct device_node *node, struct device_node *parent) +{ + void __iomem *cpu_base; + void __iomem *dist_base; + int irq; + struct irq_domain *domain = &gic_data[gic_cnt].domain; + + if (WARN_ON(!node)) + return -ENODEV; + + dist_base = of_iomap(node, 0); + WARN(!dist_base, "unable to map gic dist registers\n"); + + cpu_base = of_iomap(node, 1); + WARN(!cpu_base, "unable to map gic cpu registers\n"); + + domain->of_node = of_node_get(node); + + gic_init(gic_cnt, 16, dist_base, cpu_base); + + if (parent) { + irq = irq_of_parse_and_map(node, 0); + gic_cascade_irq(gic_cnt, irq); + } + gic_cnt++; + return 0; +} +#endif diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 43a05d90e43b..0a026b9290f2 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -40,6 +40,7 @@ extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); +int gic_of_init(struct device_node *node, struct device_node *parent); void gic_secondary_init(unsigned int); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); From f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 21 Oct 2011 17:14:27 -0500 Subject: [PATCH 63/63] ARM: gic: fix irq_alloc_descs handling for sparse irq Commit "ARM: gic: add irq_domain support" (b49b6ff) breaks SPARSE_IRQ on platforms with GIC. When SPARSE_IRQ is enabled, all NR_IRQS or mach_desc->nr_irqs will be allocated by arch_probe_nr_irqs(). This caused irq_alloc_descs to allocate irq_descs after the pre-allocated space. Make irq_alloc_descs search for an exact irq range and assume it has been pre-allocated on failure. For DT probing dynamic allocation is used. DT enabled platforms should set their nr_irqs to NR_IRQ_LEGACY and have all irq_chips allocate their irq_descs with irq_alloc_descs if SPARSE_IRQ is enabled. gic_init irq_start param is changed to be signed with negative meaning do dynamic Linux irq assigment. Signed-off-by: Rob Herring --- arch/arm/common/gic.c | 15 +++++++++++---- arch/arm/include/asm/hardware/gic.h | 2 +- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 1333e68b1f96..9d77777076f0 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -24,6 +24,7 @@ */ #include #include +#include #include #include #include @@ -562,7 +563,7 @@ const struct irq_domain_ops gic_irq_domain_ops = { #endif }; -void __init gic_init(unsigned int gic_nr, unsigned int irq_start, +void __init gic_init(unsigned int gic_nr, int irq_start, void __iomem *dist_base, void __iomem *cpu_base) { struct gic_chip_data *gic; @@ -583,7 +584,8 @@ void __init gic_init(unsigned int gic_nr, unsigned int irq_start, if (gic_nr == 0) { gic_cpu_base_addr = cpu_base; domain->hwirq_base = 16; - irq_start = (irq_start & ~31) + 16; + if (irq_start > 0) + irq_start = (irq_start & ~31) + 16; } else domain->hwirq_base = 32; @@ -598,8 +600,13 @@ void __init gic_init(unsigned int gic_nr, unsigned int irq_start, gic->gic_irqs = gic_irqs; domain->nr_irq = gic_irqs - domain->hwirq_base; - domain->irq_base = irq_alloc_descs(-1, irq_start, domain->nr_irq, + domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq, numa_node_id()); + if (IS_ERR_VALUE(domain->irq_base)) { + WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", + irq_start); + domain->irq_base = irq_start; + } domain->priv = gic; domain->ops = &gic_irq_domain_ops; irq_domain_add(domain); @@ -659,7 +666,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) domain->of_node = of_node_get(node); - gic_init(gic_cnt, 16, dist_base, cpu_base); + gic_init(gic_cnt, -1, dist_base, cpu_base); if (parent) { irq = irq_of_parse_and_map(node, 0); diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 0a026b9290f2..3e91f22046f5 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -39,7 +39,7 @@ struct device_node; extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; -void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); +void gic_init(unsigned int, int, void __iomem *, void __iomem *); int gic_of_init(struct device_node *node, struct device_node *parent); void gic_secondary_init(unsigned int); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);