sparc32: Restore SMP build and rectify sun4m NMI when non-SMP.
The non-SMP sun4m NMI handler was still accessing SUN4C registers. Fix that and share the sun4m NMI trap code between SMP and non-SMP cases. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
@@ -306,8 +306,8 @@ maybe_smp4m_msg_out:
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RESTORE_ALL
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RESTORE_ALL
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.align 4
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.align 4
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.globl linux_trap_ipi15
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.globl linux_trap_ipi15_sun4m
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linux_trap_ipi15:
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linux_trap_ipi15_sun4m:
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SAVE_ALL
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SAVE_ALL
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sethi %hi(0x80000000), %o2
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sethi %hi(0x80000000), %o2
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GET_PROCESSOR4M_ID(o0)
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GET_PROCESSOR4M_ID(o0)
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@@ -317,7 +317,7 @@ linux_trap_ipi15:
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ld [%o5 + %o0], %o5
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ld [%o5 + %o0], %o5
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ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
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ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
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andcc %o3, %o2, %g0
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andcc %o3, %o2, %g0
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be 1f ! Must be an NMI async memory error
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be sun4m_nmi_error ! Must be an NMI async memory error
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st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
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st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
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WRITE_PAUSE
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WRITE_PAUSE
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ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
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ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
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@@ -331,27 +331,6 @@ linux_trap_ipi15:
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nop
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nop
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b ret_trap_lockless_ipi
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b ret_trap_lockless_ipi
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clr %l6
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clr %l6
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1:
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/* NMI async memory error handling. */
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sethi %hi(0x80000000), %l4
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sethi %hi(sun4m_irq_global), %o5
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ld [%o5 + %lo(sun4m_irq_global)], %l5
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st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
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WRITE_PAUSE
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ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
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WRITE_PAUSE
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or %l0, PSR_PIL, %l4
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wr %l4, 0x0, %psr
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WRITE_PAUSE
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wr %l4, PSR_ET, %psr
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WRITE_PAUSE
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call sun4m_nmi
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nop
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st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
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WRITE_PAUSE
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ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
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WRITE_PAUSE
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RESTORE_ALL
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.globl smp4d_ticker
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.globl smp4d_ticker
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/* SMP per-cpu ticker interrupts are handled specially. */
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/* SMP per-cpu ticker interrupts are handled specially. */
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@@ -749,35 +728,36 @@ setcc_trap_handler:
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jmp %l2 ! advance over trap instruction
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jmp %l2 ! advance over trap instruction
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rett %l2 + 0x4 ! like this...
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rett %l2 + 0x4 ! like this...
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#ifndef CONFIG_SMP
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sun4m_nmi_error:
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.align 4
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/* NMI async memory error handling. */
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.globl linux_trap_ipi15
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sethi %hi(0x80000000), %l4
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linux_trap_ipi15:
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sethi %hi(sun4m_irq_global), %o5
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SAVE_ALL
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ld [%o5 + %lo(sun4m_irq_global)], %l5
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st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
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/* Now it is safe to re-enable traps without recursion. */
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WRITE_PAUSE
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or %l0, PSR_PIL, %l0
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ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
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wr %l0, PSR_ET, %psr
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WRITE_PAUSE
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or %l0, PSR_PIL, %l4
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wr %l4, 0x0, %psr
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WRITE_PAUSE
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wr %l4, PSR_ET, %psr
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WRITE_PAUSE
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call sun4m_nmi
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nop
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st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
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WRITE_PAUSE
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ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
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WRITE_PAUSE
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WRITE_PAUSE
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/* Now call the c-code with the pt_regs frame ptr and the
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* memory error registers as arguments. The ordering chosen
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* here is due to unlatching semantics.
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*/
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sethi %hi(AC_SYNC_ERR), %o0
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add %o0, 0x4, %o0
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lda [%o0] ASI_CONTROL, %o2 ! sync vaddr
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sub %o0, 0x4, %o0
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lda [%o0] ASI_CONTROL, %o1 ! sync error
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add %o0, 0xc, %o0
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lda [%o0] ASI_CONTROL, %o4 ! async vaddr
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sub %o0, 0x4, %o0
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lda [%o0] ASI_CONTROL, %o3 ! async error
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call sparc_lvl15_nmi
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add %sp, STACKFRAME_SZ, %o0
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RESTORE_ALL
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RESTORE_ALL
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#ifndef CONFIG_SMP
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.align 4
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.globl linux_trap_ipi15_sun4m
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linux_trap_ipi15_sun4m:
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SAVE_ALL
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ba sun4m_nmi_error
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nop
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#endif /* CONFIG_SMP */
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#endif /* CONFIG_SMP */
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.align 4
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.align 4
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@@ -111,7 +111,7 @@ t_irq12:TRAP_ENTRY_INTERRUPT(12) /* IRQ Zilog serial chip */
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t_irq13:TRAP_ENTRY_INTERRUPT(13) /* IRQ Audio Intr. */
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t_irq13:TRAP_ENTRY_INTERRUPT(13) /* IRQ Audio Intr. */
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t_irq14:TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */
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t_irq14:TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */
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.globl t_nmi
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.globl t_nmi
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t_nmi: TRAP_ENTRY(0x1f, linux_trap_ipi15)
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t_nmi: TRAP_ENTRY(0x1f, linux_trap_ipi15_sun4m)
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t_racc: TRAP_ENTRY(0x20, do_reg_access) /* General Register Access Error */
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t_racc: TRAP_ENTRY(0x20, do_reg_access) /* General Register Access Error */
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t_iacce:BAD_TRAP(0x21) /* Instr Access Error */
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t_iacce:BAD_TRAP(0x21) /* Instr Access Error */
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