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[MIPS] All MIPS32 processors support64-bit physical addresses.

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Still, only the 4K may actually implement it.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chris Dearman
2007-09-19 00:46:32 +01:00
committed by Ralf Baechle
parent 0bfa130e74
commit 962f480e0f
5 changed files with 10 additions and 10 deletions
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6
include/asm-mips/pgtable-bits.h
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@@ -32,7 +32,7 @@
* unpredictable things. The code (when it is written) to deal with
* this problem will be in the update_mmu_cache() code for the r4k.
*/
#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
#define _PAGE_PRESENT (1<<6) /* implemented in software */
#define _PAGE_READ (1<<7) /* implemented in software */
@@ -122,7 +122,7 @@
#endif
#endif
#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */
#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
@@ -139,7 +139,7 @@
#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW
#endif
#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3)
#else
#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9)