[PARISC] Move LBA and SBA register defines to the common ropes.h

header. This will allow the use of more constants in the
agpgart driver.

Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
This commit is contained in:
Kyle McMartin
2006-08-25 12:28:24 -04:00
committed by Matthew Wilcox
parent 1790cf9111
commit 983daeec99
3 changed files with 162 additions and 162 deletions

View File

@ -100,71 +100,6 @@
#define MODULE_NAME "LBA"
#define LBA_FUNC_ID 0x0000 /* function id */
#define LBA_FCLASS 0x0008 /* function class, bist, header, rev... */
#define LBA_CAPABLE 0x0030 /* capabilities register */
#define LBA_PCI_CFG_ADDR 0x0040 /* poke CFG address here */
#define LBA_PCI_CFG_DATA 0x0048 /* read or write data here */
#define LBA_PMC_MTLT 0x0050 /* Firmware sets this - read only. */
#define LBA_FW_SCRATCH 0x0058 /* Firmware writes the PCI bus number here. */
#define LBA_ERROR_ADDR 0x0070 /* On error, address gets logged here */
#define LBA_ARB_MASK 0x0080 /* bit 0 enable arbitration. PAT/PDC enables */
#define LBA_ARB_PRI 0x0088 /* firmware sets this. */
#define LBA_ARB_MODE 0x0090 /* firmware sets this. */
#define LBA_ARB_MTLT 0x0098 /* firmware sets this. */
#define LBA_MOD_ID 0x0100 /* Module ID. PDC_PAT_CELL reports 4 */
#define LBA_STAT_CTL 0x0108 /* Status & Control */
#define LBA_BUS_RESET 0x01 /* Deassert PCI Bus Reset Signal */
#define CLEAR_ERRLOG 0x10 /* "Clear Error Log" cmd */
#define CLEAR_ERRLOG_ENABLE 0x20 /* "Clear Error Log" Enable */
#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */
#define LBA_LMMIO_BASE 0x0200 /* < 4GB I/O address range */
#define LBA_LMMIO_MASK 0x0208
#define LBA_GMMIO_BASE 0x0210 /* > 4GB I/O address range */
#define LBA_GMMIO_MASK 0x0218
#define LBA_WLMMIO_BASE 0x0220 /* All < 4GB ranges under the same *SBA* */
#define LBA_WLMMIO_MASK 0x0228
#define LBA_WGMMIO_BASE 0x0230 /* All > 4GB ranges under the same *SBA* */
#define LBA_WGMMIO_MASK 0x0238
#define LBA_IOS_BASE 0x0240 /* I/O port space for this LBA */
#define LBA_IOS_MASK 0x0248
#define LBA_ELMMIO_BASE 0x0250 /* Extra LMMIO range */
#define LBA_ELMMIO_MASK 0x0258
#define LBA_EIOS_BASE 0x0260 /* Extra I/O port space */
#define LBA_EIOS_MASK 0x0268
#define LBA_GLOBAL_MASK 0x0270 /* Mercury only: Global Address Mask */
#define LBA_DMA_CTL 0x0278 /* firmware sets this */
#define LBA_IBASE 0x0300 /* SBA DMA support */
#define LBA_IMASK 0x0308
/* FIXME: ignore DMA Hint stuff until we can measure performance */
#define LBA_HINT_CFG 0x0310
#define LBA_HINT_BASE 0x0380 /* 14 registers at every 8 bytes. */
#define LBA_BUS_MODE 0x0620
/* ERROR regs are needed for config cycle kluges */
#define LBA_ERROR_CONFIG 0x0680
#define LBA_SMART_MODE 0x20
#define LBA_ERROR_STATUS 0x0688
#define LBA_ROPE_CTL 0x06A0
#define LBA_IOSAPIC_BASE 0x800 /* Offset of IRQ logic */
/* non-postable I/O port space, densely packed */
#define LBA_PORT_BASE (PCI_F_EXTEND | 0xfee00000UL)
static void __iomem *astro_iop_base __read_mostly;