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can: sja1000: add read/write routines for 8, 16 and 32-bit register access

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add routines for 8, 16 and 32-bit access like in
drivers/i2c/busses/i2c-pca-platform.c

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yegor Yefremov
2010-03-19 00:50:44 +00:00
committed by David S. Miller
parent abde89d7f5
commit 986917b7b7
1 changed files with 38 additions and 4 deletions
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42
drivers/net/can/sja1000/sja1000_platform.c
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@@ -37,16 +37,36 @@ MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus"); MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
static u8 sp_read_reg(const struct sja1000_priv *priv, int reg) static u8 sp_read_reg8(const struct sja1000_priv *priv, int reg)
{ {
return ioread8(priv->reg_base + reg); return ioread8(priv->reg_base + reg);
} }
static void sp_write_reg(const struct sja1000_priv *priv, int reg, u8 val) static void sp_write_reg8(const struct sja1000_priv *priv, int reg, u8 val)
{ {
iowrite8(val, priv->reg_base + reg); iowrite8(val, priv->reg_base + reg);
} }
static u8 sp_read_reg16(const struct sja1000_priv *priv, int reg)
{
return ioread8(priv->reg_base + reg * 2);
}
static void sp_write_reg16(const struct sja1000_priv *priv, int reg, u8 val)
{
iowrite8(val, priv->reg_base + reg * 2);
}
static u8 sp_read_reg32(const struct sja1000_priv *priv, int reg)
{
return ioread8(priv->reg_base + reg * 4);
}
static void sp_write_reg32(const struct sja1000_priv *priv, int reg, u8 val)
{
iowrite8(val, priv->reg_base + reg * 4);
}
static int sp_probe(struct platform_device *pdev) static int sp_probe(struct platform_device *pdev)
{ {
int err; int err;
@@ -92,12 +112,26 @@ static int sp_probe(struct platform_device *pdev)
dev->irq = res_irq->start; dev->irq = res_irq->start;
priv->irq_flags = res_irq->flags & (IRQF_TRIGGER_MASK | IRQF_SHARED); priv->irq_flags = res_irq->flags & (IRQF_TRIGGER_MASK | IRQF_SHARED);
priv->reg_base = addr; priv->reg_base = addr;
priv->read_reg = sp_read_reg;
priv->write_reg = sp_write_reg;
priv->can.clock.freq = pdata->clock; priv->can.clock.freq = pdata->clock;
priv->ocr = pdata->ocr; priv->ocr = pdata->ocr;
priv->cdr = pdata->cdr; priv->cdr = pdata->cdr;
switch (res_mem->flags & IORESOURCE_MEM_TYPE_MASK) {
case IORESOURCE_MEM_32BIT:
priv->read_reg = sp_read_reg32;
priv->write_reg = sp_write_reg32;
break;
case IORESOURCE_MEM_16BIT:
priv->read_reg = sp_read_reg16;
priv->write_reg = sp_write_reg16;
break;
case IORESOURCE_MEM_8BIT:
default:
priv->read_reg = sp_read_reg8;
priv->write_reg = sp_write_reg8;
break;
}
dev_set_drvdata(&pdev->dev, dev); dev_set_drvdata(&pdev->dev, dev);
SET_NETDEV_DEV(dev, &pdev->dev); SET_NETDEV_DEV(dev, &pdev->dev);