Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (169 commits) drivers/gpu/drm/radeon/atom.c: fix warning drm/radeon/kms: bump kms version number drm/radeon/kms: properly set num banks for fusion asics drm/radeon/kms/atom: move dig phy init out of modesetting drm/radeon/kms/cayman: fix typo in register mask drm/radeon/kms: fix typo in spread spectrum code drm/radeon/kms: fix tile_config value reported to userspace on cayman. drm/radeon/kms: fix incorrect comparison in cayman setup code. drm/radeon/kms: add wait idle ioctl for eg->cayman drm/radeon/cayman: setup hdp to invalidate and flush when asked drm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when asked agp/uninorth: Fix lockups with radeon KMS and >1x. drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices drm/radeon/kms: fixup eDP connector handling drm/radeon/kms: bail early for eDP in hotplug callback drm/radeon/kms: simplify hotplug handler logic drm/radeon/kms: rewrite DP handling drm/radeon/kms/atom: add support for setting DP panel mode drm/radeon/kms: atombios.h updates for DP panel mode ...
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@@ -3284,31 +3284,34 @@ static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
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* @dev: the PCI device
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* @decode: true = enable decoding, false = disable decoding
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* @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
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* @change_bridge: traverse ancestors and change bridges
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* @change_bridge_flags: traverse ancestors and change bridges
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* CHANGE_BRIDGE_ONLY / CHANGE_BRIDGE
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*/
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int pci_set_vga_state(struct pci_dev *dev, bool decode,
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unsigned int command_bits, bool change_bridge)
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unsigned int command_bits, u32 flags)
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{
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struct pci_bus *bus;
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struct pci_dev *bridge;
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u16 cmd;
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int rc;
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WARN_ON(command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
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WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) & (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)));
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/* ARCH specific VGA enables */
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rc = pci_set_vga_state_arch(dev, decode, command_bits, change_bridge);
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rc = pci_set_vga_state_arch(dev, decode, command_bits, flags);
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if (rc)
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return rc;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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if (decode == true)
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cmd |= command_bits;
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else
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cmd &= ~command_bits;
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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if (flags & PCI_VGA_STATE_CHANGE_DECODES) {
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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if (decode == true)
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cmd |= command_bits;
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else
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cmd &= ~command_bits;
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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if (change_bridge == false)
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if (!(flags & PCI_VGA_STATE_CHANGE_BRIDGE))
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return 0;
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bus = dev->bus;
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