[SPARC64]: Add infrastructure for dynamic TSB sizing.
This also cleans up tsb_context_switch(). The assembler routine is now __tsb_context_switch() and the former is an inline function that picks out the bits from the mm_struct and passes it into the assembler code as arguments. setup_tsb_parms() computes the locked TLB entry to map the TSB. Later when we support using the physical address quad load instructions of Cheetah+ and later, we'll simply use the physical address for the TSB register value and set the map virtual and PTE both to zero. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
09f94287f7
commit
98c5584cfc
@@ -9,13 +9,7 @@
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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#include <asm/mmu_context.h>
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#define TSB_ENTRY_ALIGNMENT 16
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struct tsb {
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unsigned long tag;
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unsigned long pte;
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} __attribute__((aligned(TSB_ENTRY_ALIGNMENT)));
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#include <asm/pgtable.h>
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/* We use an 8K TSB for the whole kernel, this allows to
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* handle about 4MB of modules and vmalloc mappings without
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@@ -27,10 +21,10 @@ struct tsb {
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extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
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static inline unsigned long tsb_hash(unsigned long vaddr)
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static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long nentries)
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{
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vaddr >>= PAGE_SHIFT;
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return vaddr & (KERNEL_TSB_NENTRIES - 1);
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return vaddr & (nentries - 1);
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}
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static inline int tag_compare(struct tsb *entry, unsigned long vaddr, unsigned long context)
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@@ -51,7 +45,8 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end)
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unsigned long v;
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for (v = start; v < end; v += PAGE_SIZE) {
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struct tsb *ent = &swapper_tsb[tsb_hash(v)];
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unsigned long hash = tsb_hash(v, KERNEL_TSB_NENTRIES);
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struct tsb *ent = &swapper_tsb[hash];
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if (tag_compare(ent, v, 0)) {
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ent->tag = 0UL;
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@@ -63,8 +58,9 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end)
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void flush_tsb_user(struct mmu_gather *mp)
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{
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struct mm_struct *mm = mp->mm;
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struct tsb *tsb = (struct tsb *) mm->context.sparc64_tsb;
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struct tsb *tsb = mm->context.tsb;
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unsigned long ctx = ~0UL;
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unsigned long nentries = mm->context.tsb_nentries;
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int i;
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if (CTX_VALID(mm->context))
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@@ -76,7 +72,7 @@ void flush_tsb_user(struct mmu_gather *mp)
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v &= ~0x1UL;
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ent = &tsb[tsb_hash(v)];
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ent = &tsb[tsb_hash(v, nentries)];
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if (tag_compare(ent, v, ctx)) {
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ent->tag = 0UL;
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membar_storeload_storestore();
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@@ -84,6 +80,83 @@ void flush_tsb_user(struct mmu_gather *mp)
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}
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}
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static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_bytes)
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{
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unsigned long tsb_reg, base, tsb_paddr;
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unsigned long page_sz, tte;
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mm->context.tsb_nentries = tsb_bytes / sizeof(struct tsb);
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base = TSBMAP_BASE;
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tte = (_PAGE_VALID | _PAGE_L | _PAGE_CP |
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_PAGE_CV | _PAGE_P | _PAGE_W);
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tsb_paddr = __pa(mm->context.tsb);
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/* Use the smallest page size that can map the whole TSB
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* in one TLB entry.
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*/
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switch (tsb_bytes) {
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case 8192 << 0:
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tsb_reg = 0x0UL;
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#ifdef DCACHE_ALIASING_POSSIBLE
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base += (tsb_paddr & 8192);
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#endif
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tte |= _PAGE_SZ8K;
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page_sz = 8192;
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break;
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case 8192 << 1:
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tsb_reg = 0x1UL;
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tte |= _PAGE_SZ64K;
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page_sz = 64 * 1024;
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break;
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case 8192 << 2:
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tsb_reg = 0x2UL;
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tte |= _PAGE_SZ64K;
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page_sz = 64 * 1024;
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break;
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case 8192 << 3:
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tsb_reg = 0x3UL;
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tte |= _PAGE_SZ64K;
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page_sz = 64 * 1024;
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break;
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case 8192 << 4:
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tsb_reg = 0x4UL;
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tte |= _PAGE_SZ512K;
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page_sz = 512 * 1024;
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break;
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case 8192 << 5:
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tsb_reg = 0x5UL;
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tte |= _PAGE_SZ512K;
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page_sz = 512 * 1024;
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break;
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case 8192 << 6:
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tsb_reg = 0x6UL;
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tte |= _PAGE_SZ512K;
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page_sz = 512 * 1024;
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break;
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case 8192 << 7:
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tsb_reg = 0x7UL;
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tte |= _PAGE_SZ4MB;
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page_sz = 4 * 1024 * 1024;
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break;
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};
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tsb_reg |= base;
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tsb_reg |= (tsb_paddr & (page_sz - 1UL));
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tte |= (tsb_paddr & ~(page_sz - 1UL));
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mm->context.tsb_reg_val = tsb_reg;
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mm->context.tsb_map_vaddr = base;
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mm->context.tsb_map_pte = tte;
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}
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int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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unsigned long page = get_zeroed_page(GFP_KERNEL);
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@@ -92,14 +165,22 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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if (unlikely(!page))
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return -ENOMEM;
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mm->context.sparc64_tsb = (unsigned long *) page;
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mm->context.tsb = (struct tsb *) page;
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setup_tsb_params(mm, PAGE_SIZE);
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return 0;
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}
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void destroy_context(struct mm_struct *mm)
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{
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free_page((unsigned long) mm->context.sparc64_tsb);
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free_page((unsigned long) mm->context.tsb);
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/* We can remove these later, but for now it's useful
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* to catch any bogus post-destroy_context() references
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* to the TSB.
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*/
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mm->context.tsb = NULL;
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mm->context.tsb_reg_val = 0UL;
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spin_lock(&ctx_alloc_lock);
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