drm/armada: convert overlay to use drm_plane_helper_check_update()
Use drm_plane_helper_check_update() rather than our own code to validate and limit the size of the displayed image. As we are able to support scaling, permit the full scaling ability. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
@@ -7,6 +7,7 @@
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* published by the Free Software Foundation.
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* published by the Free Software Foundation.
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*/
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*/
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#include <drm/drmP.h>
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#include <drm/drmP.h>
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#include <drm/drm_plane_helper.h>
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#include "armada_crtc.h"
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#include "armada_crtc.h"
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#include "armada_drm.h"
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#include "armada_drm.h"
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#include "armada_fb.h"
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#include "armada_fb.h"
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@@ -89,16 +90,6 @@ static void armada_plane_vbl(struct armada_crtc *dcrtc, void *data)
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wake_up(&dplane->vbl.wait);
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wake_up(&dplane->vbl.wait);
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}
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}
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static unsigned armada_limit(int start, unsigned size, unsigned max)
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{
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int end = start + size;
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if (end < 0)
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return 0;
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if (start < 0)
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start = 0;
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return (unsigned)end > max ? max - start : end - start;
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}
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static int
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static int
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armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_framebuffer *fb,
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@@ -107,26 +98,39 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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{
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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struct drm_rect src = {
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.x1 = src_x,
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.y1 = src_y,
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.x2 = src_x + src_w,
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.y2 = src_y + src_h,
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};
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struct drm_rect dest = {
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.x1 = crtc_x,
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.y1 = crtc_y,
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.x2 = crtc_x + crtc_w,
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.y2 = crtc_y + crtc_h,
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};
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const struct drm_rect clip = {
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.x2 = crtc->mode.hdisplay,
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.y2 = crtc->mode.vdisplay,
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};
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uint32_t val, ctrl0;
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uint32_t val, ctrl0;
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unsigned idx = 0;
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unsigned idx = 0;
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bool visible;
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int ret;
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int ret;
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crtc_w = armada_limit(crtc_x, crtc_w, dcrtc->crtc.mode.hdisplay);
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ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip,
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crtc_h = armada_limit(crtc_y, crtc_h, dcrtc->crtc.mode.vdisplay);
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0, INT_MAX, true, false, &visible);
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if (ret)
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return ret;
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ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) |
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ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) |
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CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) |
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CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) |
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CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA;
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CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA;
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/* Does the position/size result in nothing to display? */
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/* Does the position/size result in nothing to display? */
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if (crtc_w == 0 || crtc_h == 0) {
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if (!visible)
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ctrl0 &= ~CFG_DMA_ENA;
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ctrl0 &= ~CFG_DMA_ENA;
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}
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/*
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* FIXME: if the starting point is off screen, we need to
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* adjust src_x, src_y, src_w, src_h appropriately, and
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* according to the scale.
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*/
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if (!dcrtc->plane) {
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if (!dcrtc->plane) {
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dcrtc->plane = plane;
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dcrtc->plane = plane;
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@@ -136,15 +140,19 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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/* FIXME: overlay on an interlaced display */
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/* FIXME: overlay on an interlaced display */
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/* Just updating the position/size? */
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/* Just updating the position/size? */
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if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
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if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
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val = (src_h & 0xffff0000) | src_w >> 16;
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val = (drm_rect_height(&src) & 0xffff0000) |
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drm_rect_width(&src) >> 16;
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dplane->src_hw = val;
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dplane->src_hw = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
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val = crtc_h << 16 | crtc_w;
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val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
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dplane->dst_hw = val;
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dplane->dst_hw = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
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writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
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val = crtc_y << 16 | crtc_x;
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val = dest.y1 << 16 | dest.x1;
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dplane->dst_yx = val;
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dplane->dst_yx = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
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return 0;
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return 0;
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} else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
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} else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
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/* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
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/* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
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@@ -178,8 +186,8 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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older_fb);
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older_fb);
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}
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}
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src_y >>= 16;
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src_y = src.y1 >> 16;
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src_x >>= 16;
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src_x = src.x1 >> 16;
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sy = obj->dev_addr + fb->offsets[0] + src_y * fb->pitches[0] +
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sy = obj->dev_addr + fb->offsets[0] + src_y * fb->pitches[0] +
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src_x * fb->bits_per_pixel / 8;
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src_x * fb->bits_per_pixel / 8;
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su = obj->dev_addr + fb->offsets[1] + src_y * fb->pitches[1] +
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su = obj->dev_addr + fb->offsets[1] + src_y * fb->pitches[1] +
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@@ -208,24 +216,27 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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LCD_SPU_DMA_PITCH_UV);
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LCD_SPU_DMA_PITCH_UV);
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}
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}
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val = (src_h & 0xffff0000) | src_w >> 16;
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val = (drm_rect_height(&src) & 0xffff0000) | drm_rect_width(&src) >> 16;
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if (dplane->src_hw != val) {
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if (dplane->src_hw != val) {
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dplane->src_hw = val;
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dplane->src_hw = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_HPXL_VLN);
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LCD_SPU_DMA_HPXL_VLN);
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}
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}
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val = crtc_h << 16 | crtc_w;
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val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
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if (dplane->dst_hw != val) {
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if (dplane->dst_hw != val) {
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dplane->dst_hw = val;
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dplane->dst_hw = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DZM_HPXL_VLN);
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LCD_SPU_DZM_HPXL_VLN);
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}
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}
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val = crtc_y << 16 | crtc_x;
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val = dest.y1 << 16 | dest.x1;
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if (dplane->dst_yx != val) {
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if (dplane->dst_yx != val) {
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dplane->dst_yx = val;
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dplane->dst_yx = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_OVSA_HPXL_VLN);
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LCD_SPU_DMA_OVSA_HPXL_VLN);
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}
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}
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if (dplane->ctrl0 != ctrl0) {
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if (dplane->ctrl0 != ctrl0) {
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dplane->ctrl0 = ctrl0;
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dplane->ctrl0 = ctrl0;
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armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
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armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
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