sh: Add MMU and Cache handling sleep mode code
Add MMU and cache handling functionality to the SuperH Mobile sleep code. The MMU and cache registers are saved and restored. The MMU is disabled and the cache is flushed and disabled before entering sleep modes if the SUSP_SH_MMU flag is set. This flag should be set in the case of R-standby and most likely for future U-standby support as well. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@@ -15,6 +15,7 @@
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#include <linux/suspend.h>
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#include <asm/suspend.h>
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#include <asm/uaccess.h>
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#include <asm/cacheflush.h>
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/*
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* Notifier lists for pre/post sleep notification
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@@ -54,6 +55,10 @@ void sh_mobile_call_standby(unsigned long mode)
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atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
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mode, NULL);
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/* flush the caches if MMU flag is set */
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if (mode & SUSP_SH_MMU)
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flush_cache_all();
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/* Let assembly snippet in on-chip memory handle the rest */
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standby_onchip_mem(mode, ILRAM_BASE);
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@@ -81,6 +86,16 @@ void sh_mobile_register_self_refresh(unsigned long flags,
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/* part 0: data area */
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sdp = onchip_mem;
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sdp->addr.stbcr = 0xa4150020; /* STBCR */
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sdp->addr.pteh = 0xff000000; /* PTEH */
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sdp->addr.ptel = 0xff000004; /* PTEL */
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sdp->addr.ttb = 0xff000008; /* TTB */
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sdp->addr.tea = 0xff00000c; /* TEA */
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sdp->addr.mmucr = 0xff000010; /* MMUCR */
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sdp->addr.ptea = 0xff000034; /* PTEA */
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sdp->addr.pascr = 0xff000070; /* PASCR */
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sdp->addr.irmcr = 0xff000078; /* IRMCR */
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sdp->addr.ccr = 0xff00001c; /* CCR */
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sdp->addr.ramcr = 0xff000074; /* RAMCR */
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vp = sdp + 1;
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/* part 1: common code to enter sleep mode */
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