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spidernet: fix error interrupt handling

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In addition to the value of GHIINT0STS, spidernet interrupt handler
should check the values of GHIINT1STS/GHIINT2STS registers at the
beginning of spider_net_interrupt() so as not to drop error
interrupts.

GHIINT1STS/GHIINT2STS registers indicates some of erroneous conditions
in spidernet, and a few bits of GHIINT0STS register reflects these
conditions. But GHIINT0MSK masks these bits, so you should check these
conditions by reading GHIINT1STS/GHIINT2STS registers directly.

Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Acked-by: Jens Osterkamp <jens@de.ibm.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Ishizaki Kou
2008-04-11 12:32:30 +09:00
committed by Jeff Garzik
parent fcfcfa205e
commit 9a11fcb521
1 changed files with 10 additions and 12 deletions
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22
drivers/net/spider_net.c
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@@ -1415,18 +1415,12 @@ spider_net_link_reset(struct net_device *netdev)
* found when an interrupt is presented * found when an interrupt is presented
*/ */
static void static void
spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg) spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg,
u32 error_reg1, u32 error_reg2)
{ {
u32 error_reg1, error_reg2;
u32 i; u32 i;
int show_error = 1; int show_error = 1;
error_reg1 = spider_net_read_reg(card, SPIDER_NET_GHIINT1STS);
error_reg2 = spider_net_read_reg(card, SPIDER_NET_GHIINT2STS);
error_reg1 &= SPIDER_NET_INT1_MASK_VALUE;
error_reg2 &= SPIDER_NET_INT2_MASK_VALUE;
/* check GHIINT0STS ************************************/ /* check GHIINT0STS ************************************/
if (status_reg) if (status_reg)
for (i = 0; i < 32; i++) for (i = 0; i < 32; i++)
@@ -1656,12 +1650,15 @@ spider_net_interrupt(int irq, void *ptr)
{ {
struct net_device *netdev = ptr; struct net_device *netdev = ptr;
struct spider_net_card *card = netdev_priv(netdev); struct spider_net_card *card = netdev_priv(netdev);
u32 status_reg; u32 status_reg, error_reg1, error_reg2;
status_reg = spider_net_read_reg(card, SPIDER_NET_GHIINT0STS); status_reg = spider_net_read_reg(card, SPIDER_NET_GHIINT0STS);
status_reg &= SPIDER_NET_INT0_MASK_VALUE; error_reg1 = spider_net_read_reg(card, SPIDER_NET_GHIINT1STS);
error_reg2 = spider_net_read_reg(card, SPIDER_NET_GHIINT2STS);
if (!status_reg) if (!(status_reg & SPIDER_NET_INT0_MASK_VALUE) &&
!(error_reg1 & SPIDER_NET_INT1_MASK_VALUE) &&
!(error_reg2 & SPIDER_NET_INT2_MASK_VALUE))
return IRQ_NONE; return IRQ_NONE;
if (status_reg & SPIDER_NET_RXINT ) { if (status_reg & SPIDER_NET_RXINT ) {
@@ -1676,7 +1673,8 @@ spider_net_interrupt(int irq, void *ptr)
spider_net_link_reset(netdev); spider_net_link_reset(netdev);
if (status_reg & SPIDER_NET_ERRINT ) if (status_reg & SPIDER_NET_ERRINT )
spider_net_handle_error_irq(card, status_reg); spider_net_handle_error_irq(card, status_reg,
error_reg1, error_reg2);
/* clear interrupt sources */ /* clear interrupt sources */
spider_net_write_reg(card, SPIDER_NET_GHIINT0STS, status_reg); spider_net_write_reg(card, SPIDER_NET_GHIINT0STS, status_reg);