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ARM: imx: Get the silicon version from the IIM module

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Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.

Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Dinh Nguyen
2010-11-15 11:30:01 -06:00
committed by Sascha Hauer
parent b66ff7a2cd
commit 9ab4650f71
13 changed files with 98 additions and 110 deletions
Download Patch File Download Diff File Expand all files Collapse all files

55
arch/arm/mach-mx5/cpu.c
View File

@ -20,37 +20,18 @@
static int cpu_silicon_rev = -1;
#define SI_REV 0x48
#define IIM_SREV 0x24
static void query_silicon_parameter(void)
static int get_mx51_srev(void)
{
void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
u32 rev;
void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
u32 rev = readl(iim_base + IIM_SREV) & 0xff;
if (!rom) {
cpu_silicon_rev = -EINVAL;
return;
}
rev = readl(rom + SI_REV);
switch (rev) {
case 0x1:
cpu_silicon_rev = MX51_CHIP_REV_1_0;
break;
case 0x2:
cpu_silicon_rev = MX51_CHIP_REV_1_1;
break;
case 0x10:
cpu_silicon_rev = MX51_CHIP_REV_2_0;
break;
case 0x20:
cpu_silicon_rev = MX51_CHIP_REV_3_0;
break;
default:
cpu_silicon_rev = 0;
}
iounmap(rom);
if (rev == 0x0)
return IMX_CHIP_REVISION_2_0;
else if (rev == 0x10)
return IMX_CHIP_REVISION_3_0;
return 0;
}
/*
@ -64,7 +45,7 @@ int mx51_revision(void)
return -EINVAL;
if (cpu_silicon_rev == -1)
query_silicon_parameter();
cpu_silicon_rev = get_mx51_srev();
return cpu_silicon_rev;
}
@ -82,7 +63,7 @@ static int __init mx51_neon_fixup(void)
if (!cpu_is_mx51())
return 0;
if (mx51_revision() < MX51_CHIP_REV_3_0 && (elf_hwcap & HWCAP_NEON)) {
if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) {
elf_hwcap &= ~HWCAP_NEON;
pr_info("Turning off NEON support, detected broken NEON implementation\n");
}
@ -92,6 +73,18 @@ static int __init mx51_neon_fixup(void)
late_initcall(mx51_neon_fixup);
#endif
static int get_mx53_srev(void)
{
void __iomem *iim_base = MX51_IO_ADDRESS(MX53_IIM_BASE_ADDR);
u32 rev = readl(iim_base + IIM_SREV) & 0xff;
if (rev == 0x0)
return IMX_CHIP_REVISION_1_0;
else if (rev == 0x10)
return IMX_CHIP_REVISION_2_0;
return 0;
}
/*
* Returns:
* the silicon revision of the cpu
@ -103,7 +96,7 @@ int mx53_revision(void)
return -EINVAL;
if (cpu_silicon_rev == -1)
query_silicon_parameter();
cpu_silicon_rev = get_mx53_srev();
return cpu_silicon_rev;
}