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x86: use bitmap library for pin_programmed

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Use bitmap library for pin_programmed rather than reinvent
bitmaps.

Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Akinobu Mita
2008-04-19 23:55:13 +09:00
committed by Ingo Molnar
parent 4abc1a0068
commit a1a33fa315
2 changed files with 9 additions and 11 deletions
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14
arch/x86/kernel/mpparse.c
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@@ -799,7 +799,6 @@ void __init find_smp_config(void)
#ifdef CONFIG_X86_IO_APIC #ifdef CONFIG_X86_IO_APIC
#define MP_ISA_BUS 0 #define MP_ISA_BUS 0
#define MP_MAX_IOAPIC_PIN 127
extern struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS]; extern struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS];
@@ -982,9 +981,8 @@ void __init mp_config_acpi_legacy_irqs(void)
int mp_register_gsi(u32 gsi, int triggering, int polarity) int mp_register_gsi(u32 gsi, int triggering, int polarity)
{ {
int ioapic = -1; int ioapic;
int ioapic_pin = 0; int ioapic_pin;
int idx, bit = 0;
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
#define MAX_GSI_NUM 4096 #define MAX_GSI_NUM 4096
#define IRQ_COMPRESSION_START 64 #define IRQ_COMPRESSION_START 64
@@ -1024,15 +1022,13 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
* with redundant pin->gsi mappings (but unique PCI devices); * with redundant pin->gsi mappings (but unique PCI devices);
* we only program the IOAPIC on the first. * we only program the IOAPIC on the first.
*/ */
bit = ioapic_pin % 32; if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
if (idx > 3) {
printk(KERN_ERR "Invalid reference to IOAPIC pin " printk(KERN_ERR "Invalid reference to IOAPIC pin "
"%d-%d\n", mp_ioapic_routing[ioapic].apic_id, "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
ioapic_pin); ioapic_pin);
return gsi; return gsi;
} }
if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) { if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) {
Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
mp_ioapic_routing[ioapic].apic_id, ioapic_pin); mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
@@ -1042,7 +1038,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
#endif #endif
} }
mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit); set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed);
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
/* /*
* For GSI >= 64, use IRQ compression * For GSI >= 64, use IRQ compression

6
include/asm-x86/io_apic.h
View File

@@ -1,7 +1,7 @@
#ifndef __ASM_IO_APIC_H #ifndef __ASM_IO_APIC_H
#define __ASM_IO_APIC_H #define __ASM_IO_APIC_H
#include <asm/types.h> #include <linux/types.h>
#include <asm/mpspec.h> #include <asm/mpspec.h>
#include <asm/apicdef.h> #include <asm/apicdef.h>
@@ -110,11 +110,13 @@ extern int nr_ioapic_registers[MAX_IO_APICS];
* MP-BIOS irq configuration table structures: * MP-BIOS irq configuration table structures:
*/ */
#define MP_MAX_IOAPIC_PIN 127
struct mp_ioapic_routing { struct mp_ioapic_routing {
int apic_id; int apic_id;
int gsi_base; int gsi_base;
int gsi_end; int gsi_end;
u32 pin_programmed[4]; DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
}; };
/* I/O APIC entries */ /* I/O APIC entries */