[MMC] Fix sdhci PIO routines
The sdhci controllers operate with blocks, not bytes. The PIO routines must therefore make sure that the minimum unit transfered is a complete block. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
committed by
Russell King
parent
3192a28f7d
commit
a406f5a3b6
@@ -8,12 +8,6 @@
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* published by the Free Software Foundation.
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* published by the Free Software Foundation.
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*/
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*/
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/*
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* Note that PIO transfer is rather crappy atm. The buffer full/empty
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* interrupts aren't reliable so we currently transfer the entire buffer
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* directly. Patches to solve the problem are welcome.
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*/
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/highmem.h>
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#include <linux/highmem.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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@@ -128,7 +122,7 @@ static void sdhci_init(struct sdhci_host *host)
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SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
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SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
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SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
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SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
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SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
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SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
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SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL |
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SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
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SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
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SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
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writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
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writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
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@@ -189,79 +183,46 @@ static inline int sdhci_next_sg(struct sdhci_host* host)
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return host->num_sg;
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return host->num_sg;
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}
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}
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static void sdhci_transfer_pio(struct sdhci_host *host)
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static void sdhci_read_block_pio(struct sdhci_host *host)
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{
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{
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int blksize, chunk_remain;
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u32 data;
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char *buffer;
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char *buffer;
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u32 mask;
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int size;
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int bytes, size;
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unsigned long max_jiffies;
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BUG_ON(!host->data);
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DBG("PIO reading\n");
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if (host->num_sg == 0)
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blksize = host->data->blksz;
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return;
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chunk_remain = 0;
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data = 0;
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bytes = 0;
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if (host->data->flags & MMC_DATA_READ)
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mask = SDHCI_DATA_AVAILABLE;
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else
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mask = SDHCI_SPACE_AVAILABLE;
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buffer = sdhci_kmap_sg(host) + host->offset;
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buffer = sdhci_kmap_sg(host) + host->offset;
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/* Transfer shouldn't take more than 5 s */
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while (blksize) {
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max_jiffies = jiffies + HZ * 5;
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if (chunk_remain == 0) {
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data = readl(host->ioaddr + SDHCI_BUFFER);
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while (host->size > 0) {
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chunk_remain = min(blksize, 4);
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if (time_after(jiffies, max_jiffies)) {
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printk(KERN_ERR "%s: PIO transfer stalled. "
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"Please report this to "
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BUGMAIL ".\n", mmc_hostname(host->mmc));
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sdhci_dumpregs(host);
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sdhci_kunmap_sg(host);
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host->data->error = MMC_ERR_FAILED;
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sdhci_finish_data(host);
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return;
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}
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}
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if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask))
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continue;
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size = min(host->size, host->remain);
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size = min(host->size, host->remain);
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size = min(size, chunk_remain);
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if (size >= 4) {
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chunk_remain -= size;
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if (host->data->flags & MMC_DATA_READ)
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blksize -= size;
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*(u32*)buffer = readl(host->ioaddr + SDHCI_BUFFER);
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else
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writel(*(u32*)buffer, host->ioaddr + SDHCI_BUFFER);
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size = 4;
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} else if (size >= 2) {
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if (host->data->flags & MMC_DATA_READ)
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*(u16*)buffer = readw(host->ioaddr + SDHCI_BUFFER);
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else
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writew(*(u16*)buffer, host->ioaddr + SDHCI_BUFFER);
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size = 2;
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} else {
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if (host->data->flags & MMC_DATA_READ)
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*(u8*)buffer = readb(host->ioaddr + SDHCI_BUFFER);
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else
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writeb(*(u8*)buffer, host->ioaddr + SDHCI_BUFFER);
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size = 1;
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}
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buffer += size;
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host->offset += size;
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host->offset += size;
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host->remain -= size;
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host->remain -= size;
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bytes += size;
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host->size -= size;
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host->size -= size;
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while (size) {
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*buffer = data & 0xFF;
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buffer++;
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data >>= 8;
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size--;
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}
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if (host->remain == 0) {
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if (host->remain == 0) {
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sdhci_kunmap_sg(host);
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sdhci_kunmap_sg(host);
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if (sdhci_next_sg(host) == 0) {
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if (sdhci_next_sg(host) == 0) {
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DBG("PIO transfer: %d bytes\n", bytes);
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BUG_ON(blksize != 0);
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return;
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return;
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}
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}
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buffer = sdhci_kmap_sg(host);
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buffer = sdhci_kmap_sg(host);
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@@ -269,8 +230,85 @@ static void sdhci_transfer_pio(struct sdhci_host *host)
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}
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}
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sdhci_kunmap_sg(host);
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sdhci_kunmap_sg(host);
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}
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DBG("PIO transfer: %d bytes\n", bytes);
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static void sdhci_write_block_pio(struct sdhci_host *host)
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{
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int blksize, chunk_remain;
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u32 data;
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char *buffer;
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int bytes, size;
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DBG("PIO writing\n");
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blksize = host->data->blksz;
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chunk_remain = 4;
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data = 0;
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bytes = 0;
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buffer = sdhci_kmap_sg(host) + host->offset;
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while (blksize) {
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size = min(host->size, host->remain);
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size = min(size, chunk_remain);
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chunk_remain -= size;
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blksize -= size;
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host->offset += size;
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host->remain -= size;
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host->size -= size;
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while (size) {
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data >>= 8;
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data |= (u32)*buffer << 24;
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buffer++;
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size--;
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}
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if (chunk_remain == 0) {
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writel(data, host->ioaddr + SDHCI_BUFFER);
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chunk_remain = min(blksize, 4);
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}
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if (host->remain == 0) {
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sdhci_kunmap_sg(host);
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if (sdhci_next_sg(host) == 0) {
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BUG_ON(blksize != 0);
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return;
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}
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buffer = sdhci_kmap_sg(host);
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}
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}
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sdhci_kunmap_sg(host);
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}
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static void sdhci_transfer_pio(struct sdhci_host *host)
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{
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u32 mask;
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BUG_ON(!host->data);
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if (host->size == 0)
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return;
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if (host->data->flags & MMC_DATA_READ)
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mask = SDHCI_DATA_AVAILABLE;
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else
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mask = SDHCI_SPACE_AVAILABLE;
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while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
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if (host->data->flags & MMC_DATA_READ)
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sdhci_read_block_pio(host);
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else
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sdhci_write_block_pio(host);
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if (host->size == 0)
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break;
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BUG_ON(host->num_sg == 0);
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}
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DBG("PIO transfer complete.\n");
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}
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}
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static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
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static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
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@@ -863,7 +901,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
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if (host->data->error != MMC_ERR_NONE)
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if (host->data->error != MMC_ERR_NONE)
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sdhci_finish_data(host);
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sdhci_finish_data(host);
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else {
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else {
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if (intmask & (SDHCI_INT_BUF_FULL | SDHCI_INT_BUF_EMPTY))
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if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
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sdhci_transfer_pio(host);
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sdhci_transfer_pio(host);
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if (intmask & SDHCI_INT_DATA_END)
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if (intmask & SDHCI_INT_DATA_END)
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@@ -95,8 +95,8 @@
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#define SDHCI_INT_RESPONSE 0x00000001
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#define SDHCI_INT_RESPONSE 0x00000001
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#define SDHCI_INT_DATA_END 0x00000002
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#define SDHCI_INT_DATA_END 0x00000002
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#define SDHCI_INT_DMA_END 0x00000008
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#define SDHCI_INT_DMA_END 0x00000008
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#define SDHCI_INT_BUF_EMPTY 0x00000010
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#define SDHCI_INT_SPACE_AVAIL 0x00000010
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#define SDHCI_INT_BUF_FULL 0x00000020
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#define SDHCI_INT_DATA_AVAIL 0x00000020
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#define SDHCI_INT_CARD_INSERT 0x00000040
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#define SDHCI_INT_CARD_INSERT 0x00000040
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#define SDHCI_INT_CARD_REMOVE 0x00000080
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#define SDHCI_INT_CARD_REMOVE 0x00000080
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#define SDHCI_INT_CARD_INT 0x00000100
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#define SDHCI_INT_CARD_INT 0x00000100
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@@ -116,7 +116,7 @@
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#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
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#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
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SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX)
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SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX)
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#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
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#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
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SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL | \
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SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \
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SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
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SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
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SDHCI_INT_DATA_END_BIT)
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SDHCI_INT_DATA_END_BIT)
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