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pata_hpt37x: Further small fixes

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Further HPT37x changes

- No 66MHz 370/370A
- Remove dead special case check now we use the DPLL (as per the IDE driver)

Pointed out by Sergei

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Alan Cox
2007-04-26 00:19:25 -07:00
committed by Jeff Garzik
parent 28e21c8c0d
commit a473446856
1 changed files with 9 additions and 14 deletions
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21
drivers/ata/pata_hpt37x.c
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@@ -26,7 +26,7 @@
#include <linux/libata.h> #include <linux/libata.h>
#define DRV_NAME "pata_hpt37x" #define DRV_NAME "pata_hpt37x"
#define DRV_VERSION "0.6.4" #define DRV_VERSION "0.6.5"
struct hpt_clock { struct hpt_clock {
u8 xfer_speed; u8 xfer_speed;
@@ -130,7 +130,7 @@ static const struct hpt_chip hpt370 = {
hpt37x_timings_33, hpt37x_timings_33,
NULL, NULL,
NULL, NULL,
hpt37x_timings_66 NULL
} }
}; };
@@ -141,7 +141,7 @@ static const struct hpt_chip hpt370a = {
hpt37x_timings_33, hpt37x_timings_33,
NULL, NULL,
hpt37x_timings_50, hpt37x_timings_50,
hpt37x_timings_66 NULL
} }
}; };
@@ -1018,8 +1018,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
return -ENODEV; return -ENODEV;
port = &info_hpt372; port = &info_hpt372;
chip_table = &hpt371; chip_table = &hpt371;
/* Single channel device, paster is not present /* Single channel device, master is not present
but the NIOS (or us for non x86) must mark it but the BIOS (or us for non x86) must mark it
absent */ absent */
pci_read_config_byte(dev, 0x50, &mcr1); pci_read_config_byte(dev, 0x50, &mcr1);
mcr1 &= ~0x04; mcr1 &= ~0x04;
@@ -1131,16 +1131,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
} else { } else {
port->private_data = (void *)chip_table->clocks[clock_slot]; port->private_data = (void *)chip_table->clocks[clock_slot];
/* /*
* Perform a final fixup. The 371 and 372 clock determines * Perform a final fixup. Note that we will have used the
* if UDMA133 is available. (FIXME: should we use DPLL then ?) * DPLL on the HPT372 which means we don't have to worry
* about lack of UDMA133 support on lower clocks
*/ */
if (clock_slot == 2 && chip_table == &hpt372) { /* 50Mhz */
printk(KERN_WARNING "pata_hpt37x: No UDMA133 support available with 50MHz bus clock.\n");
if (port == &info_hpt372)
port = &info_hpt372_50;
else BUG();
}
if (clock_slot < 2 && port == &info_hpt370) if (clock_slot < 2 && port == &info_hpt370)
port = &info_hpt370_33; port = &info_hpt370_33;
if (clock_slot < 2 && port == &info_hpt370a) if (clock_slot < 2 && port == &info_hpt370a)