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drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g

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Avoid confusion between i965g meaning broadwater and the gen4+ chipset
families.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
2010-09-17 00:32:17 +01:00
parent 219adae138
commit a6c45cf013
17 changed files with 196 additions and 200 deletions
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4
drivers/gpu/drm/i915/intel_sdvo.c
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@@ -1162,7 +1162,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
return;
/* Set the SDVO control regs. */
if (IS_I965G(dev)) {
if (INTEL_INFO(dev)->gen >= 4) {
sdvox = SDVO_BORDER_ENABLE;
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
@@ -1185,7 +1185,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
if (intel_sdvo->is_hdmi)
sdvox |= SDVO_AUDIO_ENABLE;
if (IS_I965G(dev)) {
if (INTEL_INFO(dev)->gen >= 4) {
/* done in crtc_mode_set as the dpll_md reg must be written early */
} else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
/* done in crtc_mode_set as it lives inside the dpll register */